linux-kernel - Re: [PATCH v4 7/8] arm64: dts: add description for solidrun solidsense-n8 board

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Message-ID: <c06e5a6b-6150-4771-8ff6-b2cda0863a21@lunn.ch>
Date: Mon, 1 Dec 2025 14:49:06 +0100
From: Andrew Lunn <andrew@...n.ch>
To: Josua Mayer <josua@...id-run.com>
Cc: Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
	Conor Dooley <conor+dt@...nel.org>, Shawn Guo <shawnguo@...nel.org>,
	Dmitry Torokhov <dmitry.torokhov@...il.com>,
	Sascha Hauer <s.hauer@...gutronix.de>,
	Pengutronix Kernel Team <kernel@...gutronix.de>,
	Fabio Estevam <festevam@...il.com>,
	Jon Nettleton <jon@...id-run.com>,
	Mikhail Anikin <mikhail.anikin@...id-run.com>,
	Yazan Shhady <yazan.shhady@...id-run.com>,
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-input@...r.kernel.org, imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org
Subject: Re: [PATCH v4 7/8] arm64: dts: add description for solidrun
 solidsense-n8 board

> +&fec1 {
> +	pinctrl-names = "default";
> +	pinctrl-0 = <&fec1_pins>;
> +	phy-mode = "rgmii-id";
> +	phy-handle = <&phy4>;
> +	local-mac-address = [00 00 00 00 00 00];
> +	fsl,magic-packet;

Has WoL been tested, or is this copy/paste from the binding
documentation?

> +	status = "okay";
> +
> +	mdio {
> +		#address-cells = <1>;
> +		#size-cells = <0>;
> +
> +		/*
> +		 * Depending on board revision two different phys are used:
> +		 * - v1.1: atheros phy at address 4
> +		 * - v1.2+: analog devices phy at address 0
> +		 * Configure first version by default.
> +		 * On v1.2 and later, U-Boot will enable the correct phy
> +		 * based on runtime detection and patch dtb accordingly.
> +		 */
> +
> +		/* ADIN1300 */
> +		phy0: ethernet-phy@0 {
> +			reg = <0>;
> +			reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
> +			reset-assert-us = <10>;
> +			reset-deassert-us = <5000>;
> +			interrupt-parent = <&gpio1>;
> +			interrupts = <10 IRQ_TYPE_LEVEL_LOW>;

The analog devices PHY has interrupts, so can it implement WoL? Has
this been tested?

> +		/* AR8035 */
> +		phy4: ethernet-phy@4 {
> +			reg = <4>;
> +			reset-gpios = <&gpio3 19 GPIO_ACTIVE_LOW>;
> +			reset-assert-us = <10000>;
> +			status = "okay";

The Atheros PHY does not interrupts, so i assume it cannot support
WoL? You only have MAC WoL?

     Andrew