[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-Id: <DENVY6GZ4XZB.16W16KKSN1KXT@gmail.com>
Date: Tue, 02 Dec 2025 11:52:59 -0500
From: "Kurt Borja" <kuurtb@...il.com>
To: "David Lechner" <dlechner@...libre.com>, "Kurt Borja"
<kuurtb@...il.com>, "Jonathan Cameron" <jic23@...nel.org>, "Rob Herring"
<robh@...nel.org>, "Krzysztof Kozlowski" <krzk+dt@...nel.org>, "Conor
Dooley" <conor+dt@...nel.org>, "Tobias Sperling"
<tobias.sperling@...ting.com>
Cc: Nuno Sá <nuno.sa@...log.com>, "Andy Shevchenko"
<andy@...nel.org>, <linux-iio@...r.kernel.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>, "Jonathan
Cameron" <Jonathan.Cameron@...wei.com>
Subject: Re: [PATCH v3 2/2] iio: adc: Add ti-ads1018 driver
On Mon Dec 1, 2025 at 6:09 PM -05, David Lechner wrote:
...
>> +static int ads1018_buffer_preenable(struct iio_dev *indio_dev)
>> +{
>> + struct ads1018 *ads1018 = iio_priv(indio_dev);
>> + const struct ads1018_chip_info *chip_info = ads1018->chip_info;
>> + unsigned int pga, drate, addr;
>> + u16 cfg;
>> +
>> + addr = find_first_bit(indio_dev->active_scan_mask, iio_get_masklength(indio_dev));
>> + pga = ads1018_get_pga_mode(ads1018, addr);
>> + drate = ads1018_get_data_rate_mode(ads1018, addr);
>> +
>> + cfg = ADS1018_CFG_VALID;
>> + cfg |= FIELD_PREP(ADS1018_CFG_MUX_MASK, addr);
>> + cfg |= FIELD_PREP(ADS1018_CFG_PGA_MASK, pga);
>> + cfg |= FIELD_PREP(ADS1018_CFG_MODE_MASK, ADS1018_MODE_CONTINUOUS);
>> + cfg |= FIELD_PREP(ADS1018_CFG_DRATE_MASK, drate);
>> +
>> + if (chip_info->channels[addr].type == IIO_TEMP)
>> + cfg |= ADS1018_CFG_TS_MODE_EN;
>> +
>> + ads1018->tx_buf[0] = cpu_to_be16(cfg);
>> + ads1018->tx_buf[1] = 0;
>
> Seems like we could use 16-bit cycles here too?
>
Just realized, we can't use it here because we would need a CS de-assert
in between (16-bit) words and also keep it asserted after that for drdy
IRQ. The 32-bit cycle simplifies things a lot in buffer mode.
--
~ Kurt
Powered by blists - more mailing lists