linux-kernel - Re: linux-next: Tree for Nov 28 (drivers/pci/controller/dwc/pcie-nxp-s32g.o)

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Message-ID: <77bad218-9120-49d5-9d5a-7b1dcebf09b2@infradead.org>
Date: Tue, 2 Dec 2025 14:37:53 -0800
From: Randy Dunlap <rdunlap@...radead.org>
To: Manivannan Sadhasivam <mani@...nel.org>,
 Vincent Guittot <vincent.guittot@...aro.org>
Cc: Stephen Rothwell <sfr@...b.auug.org.au>,
 Linux Next Mailing List <linux-next@...r.kernel.org>,
 linux-pci@...r.kernel.org,
 Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
 Ghennadi Procopciuc <ghennadi.procopciuc@....nxp.com>,
 NXP S32 Linux Team <s32@....com>, "imx@...ts.linux.dev"
 <imx@...ts.linux.dev>, linux-arm-kernel@...ts.infradead.org,
 Bjorn Helgaas <helgaas@...nel.org>
Subject: Re: linux-next: Tree for Nov 28
 (drivers/pci/controller/dwc/pcie-nxp-s32g.o)



On 12/2/25 2:12 AM, Manivannan Sadhasivam wrote:
> On Tue, Dec 02, 2025 at 11:03:07AM +0100, Vincent Guittot wrote:
>> On Tue, 2 Dec 2025 at 10:53, Manivannan Sadhasivam <mani@...nel.org> wrote:
>>>
>>> On Tue, Dec 02, 2025 at 09:54:24AM +0100, Vincent Guittot wrote:
>>>> On Tue, 2 Dec 2025 at 05:24, Manivannan Sadhasivam <mani@...nel.org> wrote:
>>>>>
>>>>> + Vincent
>>>>
>>>> Thanks for looping me in.
>>>>>
>>>>> On Sat, Nov 29, 2025 at 07:00:04PM -0800, Randy Dunlap wrote:
>>>>>>
>>>>>>
>>>>>> On 11/27/25 9:29 PM, Stephen Rothwell wrote:
>>>>>>> Hi all,
>>>>>>>
>>>>>>> Changes since 20251127:
>>>>>>>
>>>>>>
>>>>>> on i386 (allmodconfig):
>>>>>>
>>>>>> WARNING: modpost: vmlinux: section mismatch in reference: s32g_init_pcie_controller+0x2b (section: .text) -> memblock_start_of_DRAM (section: .init.text)
>>>>
>>>> Are there details to reproduce the warning ? I don't have such warning
>>>> when compiling allmodconfig locally
>>>>
>>>> s32 pcie can only be built in but I may have to use
>>>> builtin_platform_driver_probe() instead of builtin_platform_driver()
>>>>
>>>
>>> The is due to calling a function belonging to the __init section from non-init
>>> function. Ideally, functions prefixed with __init like memblock_start_of_DRAM()
>>> should be called from the module init functions.
>>>
>>> One way to fix would be to call memblock_start_of_DRAM() in probe(), and
>>> annotate probe() with __init. Since there is no remove, you could use
>>> builtin_platform_driver_probe().
>>>
>>> This also makes me wonder if we really should be using memblock_start_of_DRAM()
>>> in the driver. I know that this was suggested to you during reviews, but I would
>>> prefer to avoid it, especially due to this being the __init function.
>>
>> yeah, I suppose I can directly define the value in the driver has
>> there is only one memory config for now anyway
>>
>> /* Boundary between peripheral space and physical memory space */
>> #define S32G_MEMORY_BOUNDARY_ADDR 0x80000000
>>
> 
> Ok. I fixed it up myself with below diff:

Thanks.
Tested-by: Randy Dunlap <rdunlap@...radead.org> # build-tested

> diff --git a/drivers/pci/controller/dwc/pcie-nxp-s32g.c b/drivers/pci/controller/dwc/pcie-nxp-s32g.c
> index eacf0229762c..70b1dc404bbe 100644
> --- a/drivers/pci/controller/dwc/pcie-nxp-s32g.c
> +++ b/drivers/pci/controller/dwc/pcie-nxp-s32g.c
> @@ -7,7 +7,6 @@
>  
>  #include <linux/interrupt.h>
>  #include <linux/io.h>
> -#include <linux/memblock.h>
>  #include <linux/module.h>
>  #include <linux/of_device.h>
>  #include <linux/of_address.h>
> @@ -35,6 +34,9 @@
>  #define PCIE_S32G_PE0_INT_STS                  0xE8
>  #define HP_INT_STS                             BIT(6)
>  
> +/* Boundary between peripheral space and physical memory space */
> +#define S32G_MEMORY_BOUNDARY_ADDR              0x80000000
> +
>  struct s32g_pcie_port {
>         struct list_head list;
>         struct phy *phy;
> @@ -99,10 +101,10 @@ static struct dw_pcie_ops s32g_pcie_ops = {
>  };
>  
>  /* Configure the AMBA AXI Coherency Extensions (ACE) interface */
> -static void s32g_pcie_reset_mstr_ace(struct dw_pcie *pci, u64 ddr_base_addr)
> +static void s32g_pcie_reset_mstr_ace(struct dw_pcie *pci)
>  {
> -       u32 ddr_base_low = lower_32_bits(ddr_base_addr);
> -       u32 ddr_base_high = upper_32_bits(ddr_base_addr);
> +       u32 ddr_base_low = lower_32_bits(S32G_MEMORY_BOUNDARY_ADDR);
> +       u32 ddr_base_high = upper_32_bits(S32G_MEMORY_BOUNDARY_ADDR);
>  
>         dw_pcie_dbi_ro_wr_en(pci);
>         dw_pcie_writel_dbi(pci, COHERENCY_CONTROL_3_OFF, 0x0);
> @@ -149,7 +151,7 @@ static int s32g_init_pcie_controller(struct dw_pcie_rp *pp)
>          * Make sure we use the coherency defaults (just in case the settings
>          * have been changed from their reset values)
>          */
> -       s32g_pcie_reset_mstr_ace(pci, memblock_start_of_DRAM());
> +       s32g_pcie_reset_mstr_ace(pci);
>  
>         dw_pcie_dbi_ro_wr_en(pci);
> 
> - Mani
> 

-- 
~Randy