[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <dwejbrb2ow7l2q3ndtiwvffzipiog3ebe3pgzccyt3662s6yrk@mxag5rmqopkn>
Date: Tue, 2 Dec 2025 15:23:48 +0900
From: Koichiro Den <den@...inux.co.jp>
To: Frank Li <Frank.li@....com>
Cc: ntb@...ts.linux.dev, linux-pci@...r.kernel.org,
dmaengine@...r.kernel.org, linux-kernel@...r.kernel.org, mani@...nel.org,
kwilczynski@...nel.org, kishon@...nel.org, bhelgaas@...gle.com, corbet@....net,
vkoul@...nel.org, jdmason@...zu.us, dave.jiang@...el.com, allenbh@...il.com,
Basavaraj.Natikar@....com, Shyam-sundar.S-k@....com, kurt.schwemmer@...rosemi.com,
logang@...tatee.com, jingoohan1@...il.com, lpieralisi@...nel.org, robh@...nel.org,
jbrunet@...libre.com, fancer.lancer@...il.com, arnd@...db.de, pstanner@...hat.com,
elfring@...rs.sourceforge.net
Subject: Re: [RFC PATCH v2 03/27] NTB: epf: Handle mwN_offset for inbound MW
regions
On Mon, Dec 01, 2025 at 02:14:03PM -0500, Frank Li wrote:
> On Sun, Nov 30, 2025 at 01:03:41AM +0900, Koichiro Den wrote:
> > Add and use new fields in the common control register to convey both
> > offset and size for each memory window (MW), so that it can correctly
> > handle flexible MW layouts and support partial BAR mappings.
> >
> > Signed-off-by: Koichiro Den <den@...inux.co.jp>
> > ---
> > drivers/ntb/hw/epf/ntb_hw_epf.c | 27 ++++++++++++++++-----------
> > 1 file changed, 16 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/ntb/hw/epf/ntb_hw_epf.c b/drivers/ntb/hw/epf/ntb_hw_epf.c
> > index d3ecf25a5162..91d3f8e05807 100644
> > --- a/drivers/ntb/hw/epf/ntb_hw_epf.c
> > +++ b/drivers/ntb/hw/epf/ntb_hw_epf.c
> > @@ -36,12 +36,13 @@
> > #define NTB_EPF_LOWER_SIZE 0x18
> > #define NTB_EPF_UPPER_SIZE 0x1C
> > #define NTB_EPF_MW_COUNT 0x20
> > -#define NTB_EPF_MW1_OFFSET 0x24
> > -#define NTB_EPF_SPAD_OFFSET 0x28
> > -#define NTB_EPF_SPAD_COUNT 0x2C
> > -#define NTB_EPF_DB_ENTRY_SIZE 0x30
> > -#define NTB_EPF_DB_DATA(n) (0x34 + (n) * 4)
> > -#define NTB_EPF_DB_OFFSET(n) (0xB4 + (n) * 4)
> > +#define NTB_EPF_MW_OFFSET(n) (0x24 + (n) * 4)
> > +#define NTB_EPF_MW_SIZE(n) (0x34 + (n) * 4)
> > +#define NTB_EPF_SPAD_OFFSET 0x44
> > +#define NTB_EPF_SPAD_COUNT 0x48
> > +#define NTB_EPF_DB_ENTRY_SIZE 0x4C
> > +#define NTB_EPF_DB_DATA(n) (0x50 + (n) * 4)
> > +#define NTB_EPF_DB_OFFSET(n) (0xD0 + (n) * 4)
>
> You need check difference version for register layout change. EP and RC
> side's software are not necessary to run the same kernel. Maybe EP side
> running at old version, RC side run at new version.
That totally makes sense, I'll do so. Thank you.
-Koichiro
>
> Frank
>
> >
> > #define NTB_EPF_MIN_DB_COUNT 3
> > #define NTB_EPF_MAX_DB_COUNT 31
> > @@ -451,11 +452,12 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx,
> > phys_addr_t *base, resource_size_t *size)
> > {
> > struct ntb_epf_dev *ndev = ntb_ndev(ntb);
> > - u32 offset = 0;
> > + resource_size_t bar_sz;
> > + u32 offset, sz;
> > int bar;
> >
> > - if (idx == 0)
> > - offset = readl(ndev->ctrl_reg + NTB_EPF_MW1_OFFSET);
> > + offset = readl(ndev->ctrl_reg + NTB_EPF_MW_OFFSET(idx));
> > + sz = readl(ndev->ctrl_reg + NTB_EPF_MW_SIZE(idx));
> >
> > bar = ntb_epf_mw_to_bar(ndev, idx);
> > if (bar < 0)
> > @@ -464,8 +466,11 @@ static int ntb_epf_peer_mw_get_addr(struct ntb_dev *ntb, int idx,
> > if (base)
> > *base = pci_resource_start(ndev->ntb.pdev, bar) + offset;
> >
> > - if (size)
> > - *size = pci_resource_len(ndev->ntb.pdev, bar) - offset;
> > + if (size) {
> > + bar_sz = pci_resource_len(ndev->ntb.pdev, bar);
> > + *size = sz ? min_t(resource_size_t, sz, bar_sz - offset)
> > + : (bar_sz > offset ? bar_sz - offset : 0);
> > + }
> >
> > return 0;
> > }
> > --
> > 2.48.1
> >
Powered by blists - more mailing lists