linux-kernel - Re: [PATCH v6 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions

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Message-ID: <3f1dbf91-f967-44dc-bb21-25fdcbbc8db2@quicinc.com>
Date: Tue, 2 Dec 2025 13:05:35 +0530
From: Nihal Kumar Gupta <quic_nihalkum@...cinc.com>
To: Vikram Sharma <quic_vikramsa@...cinc.com>,
        Konrad Dybcio
	<konrad.dybcio@....qualcomm.com>
CC: <bryan.odonoghue@...aro.org>, <mchehab@...nel.org>, <robh@...nel.org>,
        <krzk+dt@...nel.org>, <conor+dt@...nel.org>, <andersson@...nel.org>,
        <konradybcio@...nel.org>, <hverkuil-cisco@...all.nl>,
        <cros-qcom-dts-watchers@...omium.org>, <catalin.marinas@....com>,
        <will@...nel.org>, <linux-arm-kernel@...ts.infradead.org>,
        <quic_svankada@...cinc.com>, <linux-media@...r.kernel.org>,
        <linux-arm-msm@...r.kernel.org>, <devicetree@...r.kernel.org>,
        <linux-kernel@...r.kernel.org>,
        Ravi Shankar <quic_rshankar@...cinc.com>,
        Vishal Verma <quic_vishverm@...cinc.com>
Subject: Re: [PATCH v6 2/3] arm64: dts: qcom: qcs8300: Add CCI definitions



On 11/26/25 9:10 AM, Vikram Sharma wrote:
>> From: Nihal Kumar Gupta <quic_nihalkum@...cinc.com>
>>
>> Qualcomm QCS8300 SoC contains three Camera Control Interface (CCI).
>> Compared to Lemans, the key difference is in SDA/SCL GPIO assignments
>> and number of CCIs.
> [...]
> 
>> @@ -5071,6 +5182,240 @@ tlmm: pinctrl@...0000 {
>>                       #interrupt-cells = <2>;
>>                       wakeup-parent = <&pdc>;
>>
>> +                     cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
>> +                             pins = "gpio73";
>> +                             function = "gpio";
>> +                             drive-strength = <2>;
>> +                             bias-disable;
>> +                     };
> I'm not sure whether I was unclear, but my intention was to ask you to move the MCLK pin definitions to the SoC DTSI, because that comes from the design of the platform and doesn't vary between end products.
> 
> GPIO_73 being related to a voltage regulator is strictly a property of the EVK.

MCLK pin definitions are already present under the tlmm block in SoC dtsi(monaco.dtsi) as required by the pinctrl subsystem(qcom,qcs8300-tlmm.yaml).
Are you suggesting they shouldn’t be part of TLMM in the SoC DTSI? This doesn’t align with the YAML file.

Regarding GPIO_73: Noted. I will move it to monaco-evk.dts under the tlmm section.

Below are the example snippets:
In monaco.dtsi (SoC level):
tlmm: pinctrl@... {
    cam_mclk0_default: cam-mclk0-default-state {
        pins = "gpio67"; 
        function = "cam_mclk";
        drive-strength = <2>;
    };
    ....
};

In monaco-evk.dts (Board level):
&tlmm {
    cam0_avdd_2v8_en_default: cam0-avdd-2v8-en-state {
        pins = "gpio73";
        function = "gpio";
        drive-strength = <2>;
        bias-disable;
    };
    ...
};

-- 
Regards,
Nihal Kumar Gupta