linux-kernel - Re: [PATCH 15/31] gpu: nova-core: Hopper/Blackwell: add FSP falcon EMEM operations

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Message-ID: <a3dab9710988f6ccf2579c92b1751820a350af06.camel@nvidia.com>
Date: Wed, 3 Dec 2025 06:04:09 +0000
From: Timur Tabi <ttabi@...dia.com>
To: "dakr@...nel.org" <dakr@...nel.org>, John Hubbard <jhubbard@...dia.com>
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Subject: Re: [PATCH 15/31] gpu: nova-core: Hopper/Blackwell: add FSP falcon
 EMEM operations

On Tue, 2025-12-02 at 21:59 -0800, John Hubbard wrote:
> +    /// Returns `EINVAL` if offset or data length is not 4-byte aligned.
> +    #[allow(dead_code)]
> +    pub(crate) fn write_emem(&self, bar: &Bar0, offset: u32, data: &[u8]) -> Result {
> +        if offset % 4 != 0 || data.len() % 4 != 0 {
> +            return Err(EINVAL);
> +        }
> +
> +        regs::NV_PFALCON_FALCON_EMEM_CTL::default()
> +            .set_value(EMEM_CTL_WRITE | offset)
> +            .write(bar, &Fsp::ID);
> +
> +        for chunk in data.chunks_exact(4) {
> +            let word = u32::from_le_bytes([chunk[0], chunk[1], chunk[2], chunk[3]]);
> +            regs::NV_PFALCON_FALCON_EMEM_DATA::default()
> +                .set_data(word)
> +                .write(bar, &Fsp::ID);
> +        }
> +
> +        Ok(())
> +    }

So as you know, this is basically the same as my pio_wr_bytes function (which I should probably
rename to pio_wr_slice since it writes a slice now).  What do you think about extending
FalconMem to include Emem and then update pio_wr_bytes/slice to handle Emem like it does Imem
and Dmem?