linux-kernel - Re: [PATCH net-next] net: dsa: mxl-gsw1xx: fix SerDes RX polarity

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Message-ID: <20251203094959.y7pkzo2wdhkajceg@skbuf>
Date: Wed, 3 Dec 2025 11:49:59 +0200
From: Vladimir Oltean <olteanv@...il.com>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Hauke Mehrtens <hauke@...ke-m.de>, Andrew Lunn <andrew@...n.ch>,
	"David S. Miller" <davem@...emloft.net>,
	Eric Dumazet <edumazet@...gle.com>,
	Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
	netdev@...r.kernel.org, linux-kernel@...r.kernel.org,
	Rasmus Villemoes <ravi@...vas.dk>,
	"Benny (Ying-Tsan) Weng" <yweng@...linear.com>
Subject: Re: [PATCH net-next] net: dsa: mxl-gsw1xx: fix SerDes RX polarity

On Tue, Dec 02, 2025 at 09:57:21AM +0000, Daniel Golle wrote:
> According to MaxLinear engineer Benny Weng the RX lane of the SerDes
> port of the GSW1xx switches is inverted in hardware, and the
> SGMII_PHY_RX0_CFG2_INVERT bit is set by default in order to compensate
> for that. Hence also set the SGMII_PHY_RX0_CFG2_INVERT bit by default in
> gsw1xx_pcs_reset().
> 
> Fixes: 22335939ec90 ("net: dsa: add driver for MaxLinear GSW1xx switch family")
> Reported-by: Rasmus Villemoes <ravi@...vas.dk>
> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
> ---

This shouldn't impact the generic device tree property work, since as
stated there, there won't be any generically imposed default polarity if
the device tree property is missing.

We can perhaps use this thread to continue a philosophical debate on how
should the device tree deal with this situation of internally inverted
polarities (what does PHY_POL_NORMAL mean: the observable behaviour at
the external pins, or the hardware IP configuration?). I have more or
less the same debate going on with the XPCS polarity as set by
nxp_sja1105_sgmii_pma_config().

But the patch itself seems fine regardless of these side discussions.

Reviewed-by: Vladimir Oltean <olteanv@...il.com>

> Sent to net-next as the commit to be fixed is only in net-next.
> 
>  drivers/net/dsa/lantiq/mxl-gsw1xx.c | 8 +++++++-
>  1 file changed, 7 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/net/dsa/lantiq/mxl-gsw1xx.c b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> index 0816c61a47f12..cf33a16fd183b 100644
> --- a/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> +++ b/drivers/net/dsa/lantiq/mxl-gsw1xx.c
> @@ -255,10 +255,16 @@ static int gsw1xx_pcs_reset(struct gsw1xx_priv *priv)
>  	      FIELD_PREP(GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT,
>  			 GSW1XX_SGMII_PHY_RX0_CFG2_FILT_CNT_DEF);
>  
> -	/* TODO: Take care of inverted RX pair once generic property is
> +	/* RX lane seems to be inverted internally, so bit
> +	 * GSW1XX_SGMII_PHY_RX0_CFG2_INVERT needs to be set for normal
> +	 * (ie. non-inverted) operation.
> +	 *
> +	 * TODO: Take care of inverted RX pair once generic property is
>  	 *       available
>  	 */
>  
> +	val |= GSW1XX_SGMII_PHY_RX0_CFG2_INVERT;
> +
>  	ret = regmap_write(priv->sgmii, GSW1XX_SGMII_PHY_RX0_CFG2, val);
>  	if (ret < 0)
>  		return ret;
> -- 
> 2.52.0