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Message-Id: <20251204-qcom-cphy-v2-7-6b35ef8b071e@ixit.cz>
Date: Thu, 04 Dec 2025 17:32:41 +0100
From: David Heidelberg via B4 Relay <devnull+david.ixit.cz@...nel.org>
To: Robert Foss <rfoss@...nel.org>, Todor Tomov <todor.too@...il.com>,
Bryan O'Donoghue <bryan.odonoghue@...aro.org>,
Vladimir Zapolskiy <vladimir.zapolskiy@...aro.org>,
Mauro Carvalho Chehab <mchehab@...nel.org>,
Luca Weiss <luca.weiss@...rphone.com>, Petr Hodina <phodina@...tonmail.com>,
Casey Connolly <casey.connolly@...aro.org>, "Dr. Git" <drgitx@...il.com>
Cc: Joel Selvaraj <foss@...lselvaraj.com>,
Kieran Bingham <kbingham@...nel.org>,
Sakari Ailus <sakari.ailus@...ux.intel.com>, linux-media@...r.kernel.org,
linux-arm-msm@...r.kernel.org, linux-kernel@...r.kernel.org,
phone-devel@...r.kernel.org, David Heidelberg <david@...t.cz>
Subject: [PATCH WIP v2 7/8] media: qcom: camss: csiphy-3ph: C-PHY needs own
lane configuration
From: David Heidelberg <david@...t.cz>
Make sure we have proper lane registers definition in-place for each
generation, otherwise C-PHY won't work.
Signed-off-by: David Heidelberg <david@...t.cz>
---
.../platform/qcom/camss/camss-csiphy-3ph-1-0.c | 48 ++++++++++++++++------
1 file changed, 36 insertions(+), 12 deletions(-)
diff --git a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
index 6d6dd54c5ac9c..c957f7dbfb243 100644
--- a/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
+++ b/drivers/media/platform/qcom/camss/camss-csiphy-3ph-1-0.c
@@ -1222,8 +1222,12 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy,
}
break;
case CAMSS_2290:
- regs->lane_regs = &lane_regs_qcm2290[0];
- regs->lane_array_size = ARRAY_SIZE(lane_regs_qcm2290);
+ if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
+ dev_err(dev, "Missing lane_regs definition for %d\n", c->phy_cfg);
+ } else { /* V4L2_MBUS_CSI2_DPHY */
+ regs->lane_regs = &lane_regs_qcm2290[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_qcm2290);
+ }
break;
case CAMSS_7280:
case CAMSS_8250:
@@ -1236,25 +1240,45 @@ static void csiphy_lanes_enable(struct csiphy_device *csiphy,
}
break;
case CAMSS_8280XP:
- regs->lane_regs = &lane_regs_sc8280xp[0];
- regs->lane_array_size = ARRAY_SIZE(lane_regs_sc8280xp);
+ if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
+ dev_err(dev, "Missing lane_regs definition for %d\n", c->phy_cfg);
+ } else { /* V4L2_MBUS_CSI2_DPHY */
+ regs->lane_regs = &lane_regs_sc8280xp[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_sc8280xp);
+ }
break;
case CAMSS_X1E80100:
- regs->lane_regs = &lane_regs_x1e80100[0];
- regs->lane_array_size = ARRAY_SIZE(lane_regs_x1e80100);
+ if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
+ dev_err(dev, "Missing lane_regs definition for %d\n", c->phy_cfg);
+ } else { /* V4L2_MBUS_CSI2_DPHY */
+ regs->lane_regs = &lane_regs_x1e80100[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_x1e80100);
+ }
break;
case CAMSS_8550:
- regs->lane_regs = &lane_regs_sm8550[0];
- regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550);
+ if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
+ dev_err(dev, "Missing lane_regs definition for %d\n", c->phy_cfg);
+ } else { /* V4L2_MBUS_CSI2_DPHY */
+ regs->lane_regs = &lane_regs_sm8550[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8550);
+ }
break;
case CAMSS_8650:
- regs->lane_regs = &lane_regs_sm8650[0];
- regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8650);
+ if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
+ dev_err(dev, "Missing lane_regs definition for %d\n", c->phy_cfg);
+ } else { /* V4L2_MBUS_CSI2_DPHY */
+ regs->lane_regs = &lane_regs_sm8650[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_sm8650);
+ }
break;
case CAMSS_8300:
case CAMSS_8775P:
- regs->lane_regs = &lane_regs_sa8775p[0];
- regs->lane_array_size = ARRAY_SIZE(lane_regs_sa8775p);
+ if (c->phy_cfg == V4L2_MBUS_CSI2_CPHY) {
+ dev_err(dev, "Missing lane_regs definition for %d\n", c->phy_cfg);
+ } else { /* V4L2_MBUS_CSI2_DPHY */
+ regs->lane_regs = &lane_regs_sa8775p[0];
+ regs->lane_array_size = ARRAY_SIZE(lane_regs_sa8775p);
+ }
break;
default:
break;
--
2.51.0
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