linux-kernel - RE: [PATCH 2/2] x86/resctrl: Fix memory bandwidth counter width for Hygon

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Message-ID: <SJ1PR11MB6083650BCE6B9EC6C64B16B7FCA6A@SJ1PR11MB6083.namprd11.prod.outlook.com>
Date: Thu, 4 Dec 2025 17:11:10 +0000
From: "Luck, Tony" <tony.luck@...el.com>
To: Xiaochen Shen <shenxiaochen@...n-hieco.net>, "Chatre, Reinette"
	<reinette.chatre@...el.com>, "bp@...en8.de" <bp@...en8.de>,
	"fenghuay@...dia.com" <fenghuay@...dia.com>
CC: "babu.moger@....com" <babu.moger@....com>, "james.morse@....com"
	<james.morse@....com>, "Dave.Martin@....com" <Dave.Martin@....com>,
	"x86@...nel.org" <x86@...nel.org>, "linux-kernel@...r.kernel.org"
	<linux-kernel@...r.kernel.org>
Subject: RE: [PATCH 2/2] x86/resctrl: Fix memory bandwidth counter width for
 Hygon

> The default Memory Bandwidth Monitoring (MBM) counter width is 24 bits.
> Hygon CPUs provide a 32-bit width counter, but they do not support the
> MBM capability CPUID leaf (0xF.[ECX=1]:EAX) to report the width offset
> (from 24 bits).
>
> Consequently, the kernel falls back to the 24-bit default counter width,
> which causes incorrect overflow handling on Hygon CPUs.

I *think* you'd get the right results if the h/w counter is wider
than s/w expects. You'd just need to keep polling fast enough
(and we never adjusted the MBM polling rate from the original
1 HZ.)

> Fix this by explicitly setting the counter width offset to 8 bits
> (resulting in a 32-bit total counter width) for Hygon CPUs.

But the patch looks good.

Reviewed-by: Tony Luck <tony.luck@...el.com>