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Message-ID: <176488370517.2196325.5157844880170253515.robh@kernel.org>
Date: Thu, 4 Dec 2025 15:28:25 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Ashish Mhetre <amhetre@...dia.com>
Cc: nicolinc@...dia.com, jgg@...pe.ca, linux-arm-kernel@...ts.infradead.org,
krzk+dt@...nel.org, devicetree@...r.kernel.org,
jonathanh@...dia.com, iommu@...ts.linux.dev,
linux-kernel@...r.kernel.org, will@...nel.org, conor+dt@...nel.org,
vdumpa@...dia.com, joro@...tes.org, robin.murphy@....com,
linux-tegra@...r.kernel.org, thierry.reding@...il.com
Subject: Re: [PATCH V3 2/3] dt-bindings: iommu: Add NVIDIA Tegra CMDQV support
On Mon, 01 Dec 2025 16:32:18 +0000, Ashish Mhetre wrote:
> The Command Queue Virtualization (CMDQV) hardware is part of the
> SMMUv3 implementation on NVIDIA Tegra SoCs. It assists in
> virtualizing the command queue for the SMMU.
>
> Add a new device tree binding document for nvidia,tegra264-cmdqv.
>
> Also update the arm,smmu-v3 binding to include an optional nvidia,cmdqv
> property. This property is a phandle to the CMDQV device node, allowing
> the SMMU driver to associate with its corresponding CMDQV instance.
> Restrict this property usage to Nvidia Tegra264 only.
>
> Signed-off-by: Ashish Mhetre <amhetre@...dia.com>
> ---
> .../bindings/iommu/arm,smmu-v3.yaml | 30 ++++++++++++-
> .../bindings/iommu/nvidia,tegra264-cmdqv.yaml | 42 +++++++++++++++++++
> 2 files changed, 70 insertions(+), 2 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/iommu/nvidia,tegra264-cmdqv.yaml
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
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