linux-kernel - Re: [PATCH v2 5/8] drm/msm/dp: Add dpcd link

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Message-ID: <i46ywpjpe5ujrokpssqwaf2hcu4lwm5k3t3okyk25rfor3mhfj@hxl7zmpdgzte>
Date: Thu, 4 Dec 2025 11:46:44 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Dale Whinham <daleyo@...il.com>
Cc: Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
        Maxime Ripard <mripard@...nel.org>,
        Thomas Zimmermann <tzimmermann@...e.de>,
        David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
        Rob Clark <robin.clark@....qualcomm.com>,
        Dmitry Baryshkov <lumag@...nel.org>,
        Abhinav Kumar <abhinav.kumar@...ux.dev>,
        Jessica Zhang <jessica.zhang@....qualcomm.com>,
        Sean Paul <sean@...rly.run>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        Jérôme de Bretagne <jerome.debretagne@...il.com>,
        dri-devel@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        linux-arm-msm@...r.kernel.org, freedreno@...ts.freedesktop.org
Subject: Re: [PATCH v2 5/8] drm/msm/dp: Add dpcd link_rate quirk for Surface
 Pro 11 OLED

On Mon, Dec 01, 2025 at 01:14:46AM +0000, Dale Whinham wrote:
> From: Jérôme de Bretagne <jerome.debretagne@...il.com>
> 
> The Samsung ATNA30DW01-1 OLED panel in Microsoft Surface Pro 11 (Denali)
> reports a max link rate value of 0 in the DPCD register, causing the
> panel to fail to probe.
> 
> Add a quirk for this panel during DPCD read to set the max link rate
> to 8.1Gbps (HBR3), which is the expected value as reported by the
> "EDPOverrideDPCDCaps" block found in the DSDT (0x1E).
> 
> Signed-off-by: Jérôme de Bretagne <jerome.debretagne@...il.com>
> Tested-by: Dale Whinham <daleyo@...il.com>
> ---
>  drivers/gpu/drm/display/drm_dp_helper.c |  2 ++
>  drivers/gpu/drm/msm/dp/dp_panel.c       | 14 ++++++++++++++
>  include/drm/display/drm_dp_helper.h     |  7 +++++++
>  3 files changed, 23 insertions(+)
> 
> diff --git a/drivers/gpu/drm/display/drm_dp_helper.c b/drivers/gpu/drm/display/drm_dp_helper.c
> index 4aaeae4fa03c..a533fbb2988d 100644
> --- a/drivers/gpu/drm/display/drm_dp_helper.c
> +++ b/drivers/gpu/drm/display/drm_dp_helper.c
> @@ -2543,6 +2543,8 @@ static const struct dpcd_quirk dpcd_quirk_list[] = {
>  	{ OUI(0x00, 0x0C, 0xE7), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_HBLANK_EXPANSION_REQUIRES_DSC) },
>  	/* Apple MacBookPro 2017 15 inch eDP Retina panel reports too low DP_MAX_LINK_RATE */
>  	{ OUI(0x00, 0x10, 0xfa), DEVICE_ID(101, 68, 21, 101, 98, 97), false, BIT(DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_3_24_GBPS) },
> +	/* Samsung ATNA30DW01-1 OLED panel in Microsoft Surface Pro 11 reports a DP_MAX_LINK_RATE of 0 */
> +	{ OUI(0xBA, 0x41, 0x59), DEVICE_ID_ANY, false, BIT(DP_DPCD_QUIRK_CAN_DO_MAX_LINK_RATE_8_1_GBPS) },

NAK, DP_MAX_LINK_RATE = 0 is a part of the eDP standard. The driver
should use alternative method (Link Rate Table) to identify supported
link rates.

>  };
>  
>  #undef OUI

-- 
With best wishes
Dmitry