linux-kernel - Re: [PATCH net-next] net: dsa: mxl-gsw1xx: fix SerDes RX polarity

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Message-ID: <171b63b4-44f1-40e3-a1ba-a504c77a3d6b@redhat.com>
Date: Thu, 4 Dec 2025 13:29:06 +0100
From: Paolo Abeni <pabeni@...hat.com>
To: Daniel Golle <daniel@...rotopia.org>, Vladimir Oltean <olteanv@...il.com>
Cc: Hauke Mehrtens <hauke@...ke-m.de>, Andrew Lunn <andrew@...n.ch>,
 "David S. Miller" <davem@...emloft.net>, Eric Dumazet <edumazet@...gle.com>,
 Jakub Kicinski <kuba@...nel.org>, netdev@...r.kernel.org,
 linux-kernel@...r.kernel.org, Rasmus Villemoes <ravi@...vas.dk>,
 "Benny (Ying-Tsan) Weng" <yweng@...linear.com>
Subject: Re: [PATCH net-next] net: dsa: mxl-gsw1xx: fix SerDes RX polarity

On 12/4/25 12:35 AM, Daniel Golle wrote:
> On Wed, Dec 03, 2025 at 11:49:59AM +0200, Vladimir Oltean wrote:
>> On Tue, Dec 02, 2025 at 09:57:21AM +0000, Daniel Golle wrote:
>>> According to MaxLinear engineer Benny Weng the RX lane of the SerDes
>>> port of the GSW1xx switches is inverted in hardware, and the
>>> SGMII_PHY_RX0_CFG2_INVERT bit is set by default in order to compensate
>>> for that. Hence also set the SGMII_PHY_RX0_CFG2_INVERT bit by default in
>>> gsw1xx_pcs_reset().
>>>
>>> Fixes: 22335939ec90 ("net: dsa: add driver for MaxLinear GSW1xx switch family")
>>> Reported-by: Rasmus Villemoes <ravi@...vas.dk>
>>> Signed-off-by: Daniel Golle <daniel@...rotopia.org>
>>> ---
>>
>> This shouldn't impact the generic device tree property work, since as
>> stated there, there won't be any generically imposed default polarity if
>> the device tree property is missing.
>>
>> We can perhaps use this thread to continue a philosophical debate on how
>> should the device tree deal with this situation of internally inverted
>> polarities (what does PHY_POL_NORMAL mean: the observable behaviour at
>> the external pins, or the hardware IP configuration?). I have more or
>> less the same debate going on with the XPCS polarity as set by
>> nxp_sja1105_sgmii_pma_config().
> 
> In this case it is really just a bug in the datasheet, because the
> switch does set the GSW1XX_SGMII_PHY_RX0_CFG2_INVERT bit by default
> after reset, which results in RX polarity to be as expected (ie.
> negative and positive pins as labeled).
> 
> However, the driver was overwriting the register content which resulted
> in the polarity being inverted (despite the fact that the
> GSW1XX_SGMII_PHY_RX0_CFG2_INVERT wasn't set, because it is actually
> inverted internally, which just isn't well documented).
> 
>>
>> But the patch itself seems fine regardless of these side discussions.
> 
> As net-next-6.19 has been tagged by now, should I resend the patch
> via 'net' tree after the tag was merged?

Not needed, I'm applying this patch to net directly.

Thanks,

Paolo