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Message-ID: <03618cf2-b8c8-4493-a991-04bced42c7dd@open-hieco.net>
Date: Fri, 5 Dec 2025 10:38:53 +0800
From: Xiaochen Shen <shenxiaochen@...n-hieco.net>
To: "Luck, Tony" <tony.luck@...el.com>,
"Chatre, Reinette" <reinette.chatre@...el.com>, "bp@...en8.de"
<bp@...en8.de>, "fenghuay@...dia.com" <fenghuay@...dia.com>
Cc: "babu.moger@....com" <babu.moger@....com>,
"james.morse@....com" <james.morse@....com>,
"Dave.Martin@....com" <Dave.Martin@....com>, "x86@...nel.org"
<x86@...nel.org>, "linux-kernel@...r.kernel.org"
<linux-kernel@...r.kernel.org>, shenxiaochen@...n-hieco.net
Subject: Re: [PATCH 2/2] x86/resctrl: Fix memory bandwidth counter width for
Hygon
Hi Tony,
On 12/5/2025 1:11 AM, Luck, Tony wrote:
> I *think* you'd get the right results if the h/w counter is wider
> than s/w expects. You'd just need to keep polling fast enough
> (and we never adjusted the MBM polling rate from the original
> 1 HZ.)
Thank you very much for code review!
We have observed a test case where an incorrect counter width leads to random unexpected memory bandwidth readings:
https://github.com/shenxiaochen/my_documents/blob/main/memory_bandwidth_counter_width_and_overflow_issue_steps_to_reproduce.txt
The issue was resolved by applying this patch.
Best regards,
Xiaochen Shen
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