linux-kernel - Re: [PATCH v7 2/2] phy: Add Google Tensor SoC USB PHY driver

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Message-ID: <CA+zupgw4_o7Po_Zw1qT13YU=PGXoJ_RAPKiAwFpt6RRyO14OAA@mail.gmail.com>
Date: Thu, 4 Dec 2025 19:51:01 -0800
From: Roy Luo <royluo@...gle.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Peter Griffin <peter.griffin@...aro.org>, Vinod Koul <vkoul@...nel.org>, 
	Kishon Vijay Abraham I <kishon@...nel.org>, Rob Herring <robh@...nel.org>, 
	Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>, 
	André Draszik <andre.draszik@...aro.org>, 
	Tudor Ambarus <tudor.ambarus@...aro.org>, Philipp Zabel <p.zabel@...gutronix.de>, 
	Badhri Jagan Sridharan <badhri@...gle.com>, Doug Anderson <dianders@...gle.com>, linux-phy@...ts.infradead.org, 
	devicetree@...r.kernel.org, linux-kernel@...r.kernel.org, 
	linux-arm-kernel@...ts.infradead.org, linux-samsung-soc@...r.kernel.org, 
	Joy Chakraborty <joychakr@...gle.com>, Naveen Kumar <mnkumar@...gle.com>
Subject: Re: [PATCH v7 2/2] phy: Add Google Tensor SoC USB PHY driver

On Sat, Nov 22, 2025 at 4:49 AM Krzysztof Kozlowski <krzk@...nel.org> wrote:
>
> On 22/11/2025 13:48, Peter Griffin wrote:
> > Hi Roy,
> >
> > On Fri, 21 Nov 2025 at 08:56, Roy Luo <royluo@...gle.com> wrote:
> >>
> >> Support the USB PHY found on Google Tensor G5 (Laguna). This
> >> particular USB PHY supports both high-speed and super-speed
> >> operations, and is integrated with the SNPS DWC3 controller that's
> >> also on the SoC. This initial patch specifically adds functionality
> >> for high-speed.
> >>
> >> Co-developed-by: Joy Chakraborty <joychakr@...gle.com>
> >> Signed-off-by: Joy Chakraborty <joychakr@...gle.com>
> >> Co-developed-by: Naveen Kumar <mnkumar@...gle.com>
> >> Signed-off-by: Naveen Kumar <mnkumar@...gle.com>
> >> Signed-off-by: Roy Luo <royluo@...gle.com>
> >> ---
> >>  drivers/phy/Kconfig          |  13 ++
> >>  drivers/phy/Makefile         |   1 +
> >>  drivers/phy/phy-google-usb.c | 292 +++++++++++++++++++++++++++++++++++++++++++
> >
> > Please add this new file to Tensor SoC MAINTAINERS entry so it's
> > easier to review future patches.
> >
> >>  3 files changed, 306 insertions(+)
> >>
> >> diff --git a/drivers/phy/Kconfig b/drivers/phy/Kconfig
> >> index 678dd0452f0aa0597773433f04d2a9ba77474d2a..af14ec74542a9879c856dee8236753990fdf3705 100644
> >> --- a/drivers/phy/Kconfig
> >> +++ b/drivers/phy/Kconfig
> >> @@ -101,6 +101,19 @@ config PHY_NXP_PTN3222
> >>           schemes. It supports all three USB 2.0 data rates: Low Speed, Full
> >>           Speed and High Speed.
> >>
> >> +config PHY_GOOGLE_USB
> >> +       tristate "Google Tensor SoC USB PHY driver"
> >> +       depends on HAS_IOMEM
> >> +       depends on OF
> >> +       depends on TYPEC
> >
> > Add COMPILE_TEST for build testing.
>
> ... and this probably should depend on your ARCH_xxx || COMPILE_TEST
>
> Same for USB DWC driver.
>
>
> Best regards,
> Krzysztof

Peter and Krzysztof,

Thanks for the review and ack to all the comments.
Sending out a new version.

Thanks,
Roy Luo