lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <a2c6cbdb-a114-423f-a315-6e5e9ab84e5a@oss.qualcomm.com>
Date: Fri, 5 Dec 2025 12:29:25 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: quic_utiwari@...cinc.com, herbert@...dor.apana.org.au,
        thara.gopinath@...il.com, davem@...emloft.net
Cc: linux-crypto@...r.kernel.org, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, quic_neersoni@...cinc.com
Subject: Re: [PATCH v5] crypto: qce - Add runtime PM and interconnect
 bandwidth scaling support

On 11/20/25 7:24 AM, quic_utiwari@...cinc.com wrote:
> From: Udit Tiwari <quic_utiwari@...cinc.com>
> 
> The Qualcomm Crypto Engine (QCE) driver currently lacks support for
> runtime power management (PM) and interconnect bandwidth control.
> As a result, the hardware remains fully powered and clocks stay
> enabled even when the device is idle. Additionally, static
> interconnect bandwidth votes are held indefinitely, preventing the
> system from reclaiming unused bandwidth.

[...]

> @@ -90,13 +93,17 @@ static int qce_handle_queue(struct qce_device *qce,
>  	struct crypto_async_request *async_req, *backlog;
>  	int ret = 0, err;
>  
> +	ret = pm_runtime_resume_and_get(qce->dev);
> +	if (ret < 0)
> +		return ret;
> +

This is quite new, but maybe we could use

ACQUIRE(pm_runtime_active_try, pm)(qce->dev);
ret = ACQUIRE_ERR(pm_runtime_active_auto_try, &pm)
if (ret)
	return ret;

and drop the goto-s

Konrad

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ