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Message-ID: <f804d7a7-4ffb-4d2a-bbaf-ca0a076a11ab@sirena.org.uk>
Date: Fri, 5 Dec 2025 13:25:19 +0000
From: Mark Brown <broonie@...nel.org>
To: "Dutta, Anurag" <a-dutta@...com>
Cc: Nishanth Menon <nm@...com>, Francesco Dolcini <francesco@...cini.it>,
Siddharth Vadapalli <s-vadapalli@...com>, linux-spi@...r.kernel.org,
linux-kernel@...r.kernel.org, stable@...r.kernel.org
Subject: Re: [PATCH] spi: cadence-quadspi: Fix clock enable underflows due to
runtime PM
On Fri, Dec 05, 2025 at 06:28:06PM +0530, Dutta, Anurag wrote:
> Hi Mark and Nishanth The below seems to work for me on j721e. Let me know
> your thoughts.
> Also, the error actually comes from :
> if (cqspi->use_direct_mode) {
> ret = cqspi_request_mmap_dma(cqspi);
> if (ret == -EPROBE_DEFER)
> goto probe_setup_failed;
> }
> And not from flash_setup().
Great, thanks for confirming. We should probably ensure that has some
logging...
> @@ -2024,7 +2024,7 @@ static int cqspi_probe(struct platform_device *pdev)
> probe_reset_failed:
> if (cqspi->is_jh7110)
> cqspi_jh7110_disable_clk(pdev, cqspi);
> - clk_disable_unprepare(cqspi->clk);
> + pm_runtime_force_suspend(dev);
> probe_clk_failed:
The trouble with that is that in the !CONFIG_PM case
pm_runtime_force_suspend() is defined as:
static inline int pm_runtime_force_suspend(struct device *dev) { return 0; }
so we'll leak the clock enable. If we could just require runtime PM
this would be an awful lot easier to deal with.
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