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Message-ID: <aaae2ab1-04ec-4d42-afe4-7a2ed00ce903@oss.qualcomm.com>
Date: Fri, 5 Dec 2025 19:28:52 +0530
From: Akhil P Oommen <akhilpo@....qualcomm.com>
To: Krzysztof Kozlowski <krzk@...nel.org>
Cc: Rob Clark <robin.clark@....qualcomm.com>, Sean Paul <sean@...rly.run>,
        Konrad Dybcio <konradybcio@...nel.org>,
        Dmitry Baryshkov <lumag@...nel.org>,
        Abhinav Kumar <abhinav.kumar@...ux.dev>,
        Marijn Suijten <marijn.suijten@...ainline.org>,
        David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>,
        Maarten Lankhorst <maarten.lankhorst@...ux.intel.com>,
        Maxime Ripard <mripard@...nel.org>,
        Thomas Zimmermann <tzimmermann@...e.de>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley <conor+dt@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Jessica Zhang <jesszhan0024@...il.com>,
        Gaurav Kohli <gaurav.kohli@....qualcomm.com>,
        Dan Carpenter <dan.carpenter@...aro.org>,
        linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
        freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org,
        devicetree@...r.kernel.org, Jie Zhang <jie.zhang@....qualcomm.com>
Subject: Re: [PATCH v4 3/8] dt-bindings: display/msm: gpu: Document A612 GPU

On 12/4/2025 9:04 PM, Krzysztof Kozlowski wrote:
> On 04/12/2025 14:21, Akhil P Oommen wrote:
>>  
>>    clocks:
>> -    minItems: 2
>> +    minItems: 1
>>      maxItems: 7
>>  
>>    clock-names:
>> -    minItems: 2
>> +    minItems: 1
>>      maxItems: 7
>>  
>>    reg:
>> @@ -388,6 +388,32 @@ allOf:
>>          - clocks
>>          - clock-names
>>  
>> +  - if:
>> +      properties:
>> +        compatible:
>> +          contains:
>> +            const: qcom,adreno-612.0
>> +    then:
>> +      properties:
>> +        clocks:
>> +          items:
>> +            - description: GPU Core clock
>> +
>> +        clock-names:
>> +          items:
>> +            - const: core
>> +
>> +        reg-names:
>> +          minItems: 1
>> +          items:
>> +            - const: kgsl_3d0_reg_memory
>> +            - const: cx_mem
>> +            - const: cx_dbgc
> 
> The patch overall gets better, thanks, but I think I asked about this
> already - why you don't have the list strict? I don't see reason for
> making list flexible and I don't see the explanation in the commit msg.
> Either this should be fixed-size (so minItems: 3 and same for reg:) or
> you should document reasons WHY in the commit msg. Otherwise next time I
> will ask the same. :(

TBH, I was just following the convention I saw for the other entries
here. We can make it more strict. But I am curious, in which case are
num reg ranges flexible usually?

Just to confirm, we should add this here for adreno-612.0:

reg:
  minItems: 3
  maxItems: 3

reg-names:
  minItems: 3
  items:
    - const: kgsl_3d0_reg_memory
    - const: cx_mem
    - const: cx_dbgc

-Akhil>
> 
> Best regards,
> Krzysztof


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