[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <e78feaff-0b48-42b6-a824-0f102a6ac9cc@oss.qualcomm.com>
Date: Fri, 5 Dec 2025 14:15:00 +0100
From: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
To: Mukesh Ojha <mukesh.ojha@....qualcomm.com>
Cc: Bjorn Andersson <andersson@...nel.org>,
Mathieu Poirier <mathieu.poirier@...aro.org>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley
<conor+dt@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
Konrad Dybcio <konradybcio@...nel.org>, linux-arm-msm@...r.kernel.org,
linux-remoteproc@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v8 11/14] firmware: qcom_scm: Add
qcom_scm_pas_get_rsc_table() to get resource table
On 12/4/25 1:28 PM, Mukesh Ojha wrote:
> On Wed, Dec 03, 2025 at 01:36:32PM +0100, Konrad Dybcio wrote:
>> On 11/24/25 4:25 PM, Mukesh Ojha wrote:
>>> On Mon, Nov 24, 2025 at 12:48:31PM +0100, Konrad Dybcio wrote:
>>>> On 11/21/25 12:01 PM, Mukesh Ojha wrote:
>>>>> Qualcomm remote processor may rely on Static and Dynamic resources for
>>>>> it to be functional. Static resources are fixed like for example,
>>>>> memory-mapped addresses required by the subsystem and dynamic
>>>>> resources, such as shared memory in DDR etc., are determined at
>>>>> runtime during the boot process.
>>>>>
>>>>> For most of the Qualcomm SoCs, when run with Gunyah or older QHEE
>>>>> hypervisor, all the resources whether it is static or dynamic, is
>>>>> managed by the hypervisor. Dynamic resources if it is present for a
>>>>> remote processor will always be coming from secure world via SMC call
>>>>> while static resources may be present in remote processor firmware
>>>>> binary or it may be coming qcom_scm_pas_get_rsc_table() SMC call along
>>>>> with dynamic resources.
[...]
> Just to avoid iteration, are you suggesting that we can keep this
> guesswork as part of __qcom_scm_pas_get_rsc_table() and start with
> something smaller than SZ_16K?
>
> I kind of agree with the first part, but SZ_16K was the recommended size
> from the firmware for Lemans to start with, in order to pass the SMC
> successfully on the first try. However, the same size was failing for
> Glymur, and it required a second attempt with the correct size.
It depends on the payload, which you're probably much more familiar with.
If 95% of them will be closer to e.g. 1K in size, it perhaps makes sense
to use up the additional few dozen cycles on our amazingly fast CPUs and
retry as necessary, instead of blindly reserving a whole bunch of memory.
Konrad
Powered by blists - more mailing lists