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Message-ID: <5afbf96a-c87f-43cb-8cd1-d7c9970bfd07@tuxon.dev>
Date: Sat, 6 Dec 2025 13:19:19 +0200
From: Claudiu Beznea <claudiu.beznea@...on.dev>
To: Conor Dooley <conor@...nel.org>, linux-kernel@...r.kernel.org
Cc: Conor Dooley <conor.dooley@...rochip.com>,
Daire McNamara <daire.mcnamara@...rochip.com>,
Michael Turquette <mturquette@...libre.com>, Stephen Boyd
<sboyd@...nel.org>, Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>, linux-riscv@...ts.infradead.org,
linux-clk@...r.kernel.org, devicetree@...r.kernel.org,
Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
Subject: Re: [PATCH v2 2/3] dt-bindings: clock: mpfs-ccc: Add pic64gx
compatibility
On 11/21/25 15:44, Conor Dooley wrote:
> From: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
>
> pic64gx SoC Clock Conditioning Circuitry is compatibles
> with the Polarfire SoC
>
> Signed-off-by: Pierre-Henry Moussay <pierre-henry.moussay@...rochip.com>
> Acked-by: Conor Dooley <conor.dooley@...rochip.com>
> Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
Reviewed-by: Claudiu Beznea <claudiu.beznea@...on.dev>
> ---
> .../devicetree/bindings/clock/microchip,mpfs-ccc.yaml | 6 +++++-
> 1 file changed, 5 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
> index f1770360798f..9a6b50527c42 100644
> --- a/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
> +++ b/Documentation/devicetree/bindings/clock/microchip,mpfs-ccc.yaml
> @@ -17,7 +17,11 @@ description: |
>
> properties:
> compatible:
> - const: microchip,mpfs-ccc
> + oneOf:
> + - items:
> + - const: microchip,pic64gx-ccc
> + - const: microchip,mpfs-ccc
> + - const: microchip,mpfs-ccc
>
> reg:
> items:
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