[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20251207130939.6e72fb9d@jic23-huawei>
Date: Sun, 7 Dec 2025 13:09:39 +0000
From: Jonathan Cameron <jic23@...nel.org>
To: Nuno Sá <noname.nuno@...il.com>
Cc: Tomas Melin <tomas.melin@...sala.com>, Lars-Peter Clausen
<lars@...afoo.de>, Michael Hennerich <Michael.Hennerich@...log.com>, Nuno
Sa <nuno.sa@...log.com>, David Lechner <dlechner@...libre.com>, Andy
Shevchenko <andy@...nel.org>, Alexandru Ardelean
<alexandru.ardelean@...log.com>, Jonathan Cameron
<Jonathan.Cameron@...wei.com>, linux-iio@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 2/2] iio: adc: ad9467: support write/read offset
On Wed, 03 Dec 2025 11:05:50 +0000
Nuno Sá <noname.nuno@...il.com> wrote:
> On Wed, 2025-12-03 at 09:28 +0000, Tomas Melin wrote:
> > Support configuring output calibration value. Among the devices
> > currently supported by this driver, this setting is specific to
> > ad9434. The offset can be used to calibrate the output against
> > a known input. The register is called offset, but the procedure
> > is best mapped internally with calibbias operation.
> >
> > Reviewed-by: David Lechner <dlechner@...libre.com>
> > Signed-off-by: Tomas Melin <tomas.melin@...sala.com>
> > ---
>
> Still don't really like the style in .info_mask_shared_by_type and
> .info_mask_shared_by_type_available. But ok, it seems I'm the only one. So:
>
> Reviewed-by: Nuno Sá <nuno.sa@...log.com>
Applied but with via _calibbias added to the patch title to make
it clear this isn't via _offset which might make people waste time
wondering what is going on.
Note this is on my local tree that I might push out as testing
but will only become togreg after I rebase on rc1 in a week or so.
Thanks,
Jonathan
>
> > drivers/iio/adc/ad9467.c | 60 +++++++++++++++++++++++++++++++++++++++++++++++-
> > 1 file changed, 59 insertions(+), 1 deletion(-)
> >
> > diff --git a/drivers/iio/adc/ad9467.c b/drivers/iio/adc/ad9467.c
> > index 2d8f8da3671dac61994a1864a82cdbef7f54c1af..48c10acb1566ba471be0804e7c39b0b553d76188 100644
> > --- a/drivers/iio/adc/ad9467.c
> > +++ b/drivers/iio/adc/ad9467.c
> > @@ -145,6 +145,7 @@ struct ad9467_chip_info {
> > unsigned int num_lanes;
> > unsigned int dco_en;
> > unsigned int test_points;
> > + const int *offset_range;
> > /* data clock output */
> > bool has_dco;
> > bool has_dco_invert;
> > @@ -234,6 +235,10 @@ static int ad9467_reg_access(struct iio_dev *indio_dev, unsigned int reg,
> > return 0;
> > }
> >
> > +static const int ad9434_offset_range[] = {
> > + -128, 1, 127,
> > +};
> > +
> > static const unsigned int ad9265_scale_table[][2] = {
> > {1250, 0x00}, {1500, 0x40}, {1750, 0x80}, {2000, 0xC0},
> > };
> > @@ -298,7 +303,24 @@ static void __ad9467_get_scale(struct ad9467_state *st, int index,
> > }
> >
> > static const struct iio_chan_spec ad9434_channels[] = {
> > - AD9467_CHAN(0, BIT(IIO_CHAN_INFO_SCALE), 0, 12, 's'),
> > + {
> > + .type = IIO_VOLTAGE,
> > + .indexed = 1,
> > + .channel = 0,
> > + .info_mask_shared_by_type =
> > + BIT(IIO_CHAN_INFO_SCALE) |
> > + BIT(IIO_CHAN_INFO_SAMP_FREQ) |
> > + BIT(IIO_CHAN_INFO_CALIBBIAS),
> > + .info_mask_shared_by_type_available =
> > + BIT(IIO_CHAN_INFO_SCALE) |
> > + BIT(IIO_CHAN_INFO_CALIBBIAS),
> > + .scan_index = 0,
> > + .scan_type = {
> > + .sign = 's',
> > + .realbits = 12,
> > + .storagebits = 16,
> > + },
> > + },
> > };
> >
> > static const struct iio_chan_spec ad9467_channels[] = {
> > @@ -367,6 +389,7 @@ static const struct ad9467_chip_info ad9434_chip_tbl = {
> > .default_output_mode = AD9434_DEF_OUTPUT_MODE,
> > .vref_mask = AD9434_REG_VREF_MASK,
> > .num_lanes = 6,
> > + .offset_range = ad9434_offset_range,
> > };
> >
> > static const struct ad9467_chip_info ad9265_chip_tbl = {
> > @@ -499,6 +522,33 @@ static int ad9467_set_scale(struct ad9467_state *st, int val, int val2)
> > return -EINVAL;
> > }
> >
> > +static int ad9467_get_offset(struct ad9467_state *st, int *val)
> > +{
> > + int ret;
> > +
> > + ret = ad9467_spi_read(st, AN877_ADC_REG_OFFSET);
> > + if (ret < 0)
> > + return ret;
> > + *val = ret;
> > +
> > + return IIO_VAL_INT;
> > +}
> > +
> > +static int ad9467_set_offset(struct ad9467_state *st, int val)
> > +{
> > + int ret;
> > +
> > + if (val < st->info->offset_range[0] || val > st->info->offset_range[2])
> > + return -EINVAL;
> > +
> > + ret = ad9467_spi_write(st, AN877_ADC_REG_OFFSET, val);
> > + if (ret < 0)
> > + return ret;
> > +
> > + return ad9467_spi_write(st, AN877_ADC_REG_TRANSFER,
> > + AN877_ADC_TRANSFER_SYNC);
> > +}
> > +
> > static int ad9467_outputmode_set(struct ad9467_state *st, unsigned int mode)
> > {
> > int ret;
> > @@ -802,6 +852,8 @@ static int ad9467_read_raw(struct iio_dev *indio_dev,
> > struct ad9467_state *st = iio_priv(indio_dev);
> >
> > switch (m) {
> > + case IIO_CHAN_INFO_CALIBBIAS:
> > + return ad9467_get_offset(st, val);
> > case IIO_CHAN_INFO_SCALE:
> > return ad9467_get_scale(st, val, val2);
> > case IIO_CHAN_INFO_SAMP_FREQ:
> > @@ -836,6 +888,8 @@ static int ad9467_write_raw(struct iio_dev *indio_dev,
> > int ret;
> >
> > switch (mask) {
> > + case IIO_CHAN_INFO_CALIBBIAS:
> > + return ad9467_set_offset(st, val);
> > case IIO_CHAN_INFO_SCALE:
> > return ad9467_set_scale(st, val, val2);
> > case IIO_CHAN_INFO_SAMP_FREQ:
> > @@ -874,6 +928,10 @@ static int ad9467_read_avail(struct iio_dev *indio_dev,
> > const struct ad9467_chip_info *info = st->info;
> >
> > switch (mask) {
> > + case IIO_CHAN_INFO_CALIBBIAS:
> > + *type = IIO_VAL_INT;
> > + *vals = info->offset_range;
> > + return IIO_AVAIL_RANGE;
> > case IIO_CHAN_INFO_SCALE:
> > *vals = (const int *)st->scales;
> > *type = IIO_VAL_INT_PLUS_MICRO;
Powered by blists - more mailing lists