linux-kernel - [PATCH v2 3/3] PCI: Bail out early for 2.5GT/s devices in PCIe failed link retraining

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Message-ID: <alpine.DEB.2.21.2512080356070.49654@angie.orcam.me.uk>
Date: Mon, 8 Dec 2025 19:24:38 +0000 (GMT)
From: "Maciej W. Rozycki" <macro@...am.me.uk>
To: Bjorn Helgaas <bhelgaas@...gle.com>, 
    Matthew W Carlis <mattc@...estorage.com>, 
    ALOK TIWARI <alok.a.tiwari@...cle.com>
cc: ashishk@...estorage.com, msaggi@...estorage.com, sconnor@...estorage.com, 
    Lukas Wunner <lukas@...ner.de>, 
    Ilpo Järvinen <ilpo.jarvinen@...ux.intel.com>, 
    Jiwei <jiwei.sun.bj@...com>, guojinhui.liam@...edance.com, 
    ahuang12@...ovo.com, sunjw10@...ovo.com, linux-pci@...r.kernel.org, 
    linux-kernel@...r.kernel.org
Subject: [PATCH v2 3/3] PCI: Bail out early for 2.5GT/s devices in PCIe failed
 link retraining

There's no point in retraining a failed 2.5GT/s device at 2.5GT/s, so 
just don't and return early.  While such devices might be unlikely to 
implement Link Active reporting, we need to retrieve the maximum link 
speed and use it in a conditional later on anyway, so the early check 
comes for free.

Signed-off-by: Maciej W. Rozycki <macro@...am.me.uk>
---
 drivers/pci/quirks.c |    8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

linux-pcie-failed-link-retrain-speed-cap-early.diff
Index: linux-macro/drivers/pci/quirks.c
===================================================================
--- linux-macro.orig/drivers/pci/quirks.c
+++ linux-macro/drivers/pci/quirks.c
@@ -101,6 +101,10 @@ int pcie_failed_link_retrain(struct pci_
 	    !pcie_cap_has_lnkctl2(dev) || !dev->link_active_reporting)
 		return ret;
 
+	speed_cap = pcie_get_speed_cap(dev);
+	if (speed_cap <= PCIE_SPEED_2_5GT)
+		return ret;
+
 	pcie_capability_read_word(dev, PCI_EXP_LNKSTA, &lnksta);
 	pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &oldlnkctl2);
 	if (!(lnksta & PCI_EXP_LNKSTA_DLLLA) && pcie_lbms_seen(dev, lnksta)) {
@@ -110,10 +114,8 @@ int pcie_failed_link_retrain(struct pci_
 			goto err;
 	}
 
-	speed_cap = pcie_get_speed_cap(dev);
 	pcie_capability_read_word(dev, PCI_EXP_LNKCTL2, &lnkctl2);
-	if ((lnkctl2 & PCI_EXP_LNKCTL2_TLS) == PCI_EXP_LNKCTL2_TLS_2_5GT &&
-	    speed_cap > PCIE_SPEED_2_5GT) {
+	if ((lnkctl2 & PCI_EXP_LNKCTL2_TLS) == PCI_EXP_LNKCTL2_TLS_2_5GT) {
 		pci_info(dev, "removing 2.5GT/s downstream link speed restriction\n");
 		ret = pcie_set_target_speed(dev, speed_cap, false);
 		if (ret)