linux-kernel - Re: [PATCH v2] platform/x86: int3472: Use actual clock frequency for DSM method

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Message-ID: <e73cba30-78e8-42a0-931b-ea2939d53c38@ideasonboard.com>
Date: Mon, 8 Dec 2025 07:48:00 +0000
From: Dan Scally <dan.scally@...asonboard.com>
To: Hao Yao <hao.yao@...el.com>, platform-driver-x86@...r.kernel.org,
 johannes.goede@....qualcomm.com, sakari.ailus@...ux.intel.com,
 ilpo.jarvinen@...ux.intel.com
Cc: bingbu.cao@...el.com, linux-media@...r.kernel.org,
 linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2] platform/x86: int3472: Use actual clock frequency for
 DSM method

Morning Hao, thanks for the patch

On 08/12/2025 03:51, Hao Yao wrote:
> The third argument (args[2]) to the _DSM method was hardcoded to 1,
> which corresponds to 19.2MHz. However, this argument should reflect
> the actual clock frequency from the sensor's ACPI data.
> 
> According to the DSM specification:
> - 1 = 19.2MHz
> - 3 = 24MHz
> 
> Read the frequency from clk->frequency and set the DSM argument
> accordingly, with 19.2MHz as the default for unsupported frequencies.
> 
> This ensures the sensor receives the correct clock frequency as
> specified in its ACPI configuration.
> 
> Signed-off-by: Hao Yao <hao.yao@...el.com>

Reviewed-by: Daniel Scally <dan.scally@...asonboard.com>

> ---
>   .../x86/intel/int3472/clk_and_regulator.c     | 21 ++++++++++++++++++-
>   1 file changed, 20 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/platform/x86/intel/int3472/clk_and_regulator.c b/drivers/platform/x86/intel/int3472/clk_and_regulator.c
> index 9e052b164a1a..c834fd59ec0c 100644
> --- a/drivers/platform/x86/intel/int3472/clk_and_regulator.c
> +++ b/drivers/platform/x86/intel/int3472/clk_and_regulator.c
> @@ -19,23 +19,42 @@ static const guid_t img_clk_guid =
>   	GUID_INIT(0x82c0d13a, 0x78c5, 0x4244,
>   		  0x9b, 0xb1, 0xeb, 0x8b, 0x53, 0x9a, 0x8d, 0x11);
>   
> +/*
> + * The PCH clock frequency argument to the _DSM method:
> + * PCH_CLK_FREQ_19M2 = 19.2MHz (default)
> + * PCH_CLK_FREQ_24M = 24MHz
> + */
> +#define PCH_CLK_FREQ_19M2	1
> +#define PCH_CLK_FREQ_24M	3
> +
>   static void skl_int3472_enable_clk(struct int3472_clock *clk, int enable)
>   {
>   	struct int3472_discrete_device *int3472 = to_int3472_device(clk);
>   	union acpi_object args[3];
>   	union acpi_object argv4;
> +	u32 dsm_freq_arg;
>   
>   	if (clk->ena_gpio) {
>   		gpiod_set_value_cansleep(clk->ena_gpio, enable);
>   		return;
>   	}
>   
> +	switch (clk->frequency) {
> +	case 24000000:
> +		dsm_freq_arg = PCH_CLK_FREQ_24M;
> +		break;
> +	case 19200000:
> +	default:
> +		dsm_freq_arg = PCH_CLK_FREQ_19M2;
> +		break;
> +	}
> +
>   	args[0].integer.type = ACPI_TYPE_INTEGER;
>   	args[0].integer.value = clk->imgclk_index;
>   	args[1].integer.type = ACPI_TYPE_INTEGER;
>   	args[1].integer.value = enable;
>   	args[2].integer.type = ACPI_TYPE_INTEGER;
> -	args[2].integer.value = 1;
> +	args[2].integer.value = dsm_freq_arg;
>   
>   	argv4.type = ACPI_TYPE_PACKAGE;
>   	argv4.package.count = 3;