linux-kernel - Re: [PATCH v9 17/48] perf jevents: Add upc metric for uops per cycle for AMD

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <25e7ebdf-39d3-418a-ac23-8f63b3f9f372@amd.com>
Date: Mon, 8 Dec 2025 15:16:34 +0530
From: Sandipan Das <sandipan.das@....com>
To: Ian Rogers <irogers@...gle.com>, Adrian Hunter <adrian.hunter@...el.com>,
 Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
 Arnaldo Carvalho de Melo <acme@...nel.org>,
 Benjamin Gray <bgray@...ux.ibm.com>, Caleb Biggers
 <caleb.biggers@...el.com>, Edward Baker <edward.baker@...el.com>,
 Ingo Molnar <mingo@...hat.com>, James Clark <james.clark@...aro.org>,
 Jing Zhang <renyu.zj@...ux.alibaba.com>, Jiri Olsa <jolsa@...nel.org>,
 John Garry <john.g.garry@...cle.com>, Leo Yan <leo.yan@....com>,
 Namhyung Kim <namhyung@...nel.org>, Perry Taylor <perry.taylor@...el.com>,
 Peter Zijlstra <peterz@...radead.org>, Samantha Alt
 <samantha.alt@...el.com>, Thomas Falcon <thomas.falcon@...el.com>,
 Weilin Wang <weilin.wang@...el.com>, Xu Yang <xu.yang_2@....com>,
 linux-kernel@...r.kernel.org, linux-perf-users@...r.kernel.org
Subject: Re: [PATCH v9 17/48] perf jevents: Add upc metric for uops per cycle
 for AMD

On 12/2/2025 11:20 PM, Ian Rogers wrote:
> The metric adjusts for whether or not SMT is on.
> 
> Signed-off-by: Ian Rogers <irogers@...gle.com>
> Reviewed-by: Sandipan Das <sandipan.das@....com>
> ---
>  tools/perf/pmu-events/amd_metrics.py | 22 +++++++++++++++++++---
>  1 file changed, 19 insertions(+), 3 deletions(-)
> 
> diff --git a/tools/perf/pmu-events/amd_metrics.py b/tools/perf/pmu-events/amd_metrics.py
> index f51a044b8005..42e46b33334d 100755
> --- a/tools/perf/pmu-events/amd_metrics.py
> +++ b/tools/perf/pmu-events/amd_metrics.py
> @@ -3,14 +3,26 @@
>  import argparse
>  import math
>  import os
> +from typing import Optional
>  from metric import (d_ratio, has_event, max, Event, JsonEncodeMetric,
> -                    JsonEncodeMetricGroupDescriptions, LoadEvents, Metric,
> -                    MetricGroup, Select)
> +                    JsonEncodeMetricGroupDescriptions, Literal, LoadEvents,
> +                    Metric, MetricGroup, Select)
>  
>  # Global command line arguments.
>  _args = None
> -
> +_zen_model: int = 1
>  interval_sec = Event("duration_time")
> +ins = Event("instructions")
> +cycles = Event("cycles")
> +# Number of CPU cycles scaled for SMT.
> +smt_cycles = Select(cycles / 2, Literal("#smt_on"), cycles)

The CPU architects said that while there are some fairness guarantees, the distribution
of resources amongst sibling threads is not always equal. There is also no easy way to
determine this.

> +
> +
> +def AmdUpc() -> Metric:
> +    ops = Event("ex_ret_ops", "ex_ret_cops")
> +    upc = d_ratio(ops, smt_cycles)
> +    return Metric("lpm_upc", "Micro-ops retired per core cycle (higher is better)",
> +                  upc, "uops/cycle")

Zen 3 onwards, PMCx0C1, which is used by ex_ret_ops and ex_ret_cops, counts retired
macro-ops.

>  
>  
>  def Idle() -> Metric:
> @@ -45,6 +57,7 @@ def Rapl() -> MetricGroup:
>  
>  def main() -> None:
>      global _args
> +    global _zen_model
>  
>      def dir_path(path: str) -> str:
>          """Validate path is a directory for argparse."""
> @@ -67,7 +80,10 @@ def main() -> None:
>      directory = f"{_args.events_path}/x86/{_args.model}/"
>      LoadEvents(directory)
>  
> +    _zen_model = int(_args.model[6:])
> +
>      all_metrics = MetricGroup("", [
> +        AmdUpc(),
>          Idle(),
>          Rapl(),
>      ])