linux-kernel - Re: [PATCH v4] arm64: dts: qcom: x1e80100: Add crypto engine

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Message-ID: <f41c3d9e-2597-4c33-96c1-0eeba41dc803@oss.qualcomm.com>
Date: Wed, 10 Dec 2025 10:43:59 +0530
From: Harshal Dev <harshal.dev@....qualcomm.com>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
Cc: Konrad Dybcio <konrad.dybcio@....qualcomm.com>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konradybcio@...nel.org>, Rob Herring <robh@...nel.org>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Conor Dooley
 <conor+dt@...nel.org>, linux-arm-msm@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        Val Packett <val@...kett.cool>,
        Stephan Gerhold
 <stephan.gerhold@...aro.org>,
        Abel Vesa <abel.vesa@....qualcomm.com>,
        Udit Tiwari <quic_utiwari@...cinc.com>,
        Neeraj Soni <quic_neersoni@...cinc.com>
Subject: Re: [PATCH v4] arm64: dts: qcom: x1e80100: Add crypto engine



On 12/9/2025 1:09 PM, Dmitry Baryshkov wrote:
> On Tue, Dec 09, 2025 at 12:57:29PM +0530, Harshal Dev wrote:
>> Hi,
>>
>> On 12/8/2025 9:26 PM, Konrad Dybcio wrote:
>>> On 12/8/25 1:32 PM, Harshal Dev wrote:
>>>> On X Elite, there is a crypto engine IP block similar to ones found on
>>>> SM8x50 platforms.
>>>>
>>>> Describe the crypto engine and its BAM.
>>>>
>>>> Signed-off-by: Harshal Dev <harshal.dev@....qualcomm.com>
>>>> ---
>>>> The dt-binding schema update for the x1e80100 compatible is here
>>>> (already merged):
>>>>     
>>>> https://lore.kernel.org/all/20250213-dt-bindings-qcom-qce-x1e80100-v1-1-d17ef73a1c12@linaro.org/
>>>> ---
>>>
>>>
>>>> +		cryptobam: dma-controller@...4000 {
>>>> +			compatible = "qcom,bam-v1.7.4", "qcom,bam-v1.7.0";
>>>> +			reg = <0x0 0x01dc4000 0x0 0x28000>;
>>>> +			interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
>>>> +			#dma-cells = <1>;
>>>> +			iommus = <&apps_smmu 0x480 0x0>,
>>>> +				 <&apps_smmu 0x481 0x0>;
>>>> +			qcom,ee = <0>;
>>>> +			qcom,controlled-remotely;
>>>> +			num-channels = <20>;
>>>> +			qcom,num-ees = <4>;
>>>> +		};
>>>> +
>>>> +		crypto: crypto@...a000 {
>>>> +			compatible = "qcom,x1e80100-qce", "qcom,sm8150-qce", "qcom,qce";
>>>> +			reg = <0x0 0x01dfa000 0x0 0x6000>;
>>>> +			dmas = <&cryptobam 4>, <&cryptobam 5>;
>>>> +			dma-names = "rx",
>>>> +				    "tx";
>>>> +			iommus = <&apps_smmu 0x480 0x0>,
>>>> +				 <&apps_smmu 0x481 0x0>;
>>>> +			interconnects = <&aggre2_noc MASTER_CRYPTO QCOM_ICC_TAG_ALWAYS
>>>> +					 &mc_virt SLAVE_EBI1 QCOM_ICC_TAG_ALWAYS>;
>>>> +			interconnect-names = "memory";
>>>> +		};
>>>> +
>>>>  		cnoc_main: interconnect@...0000 {
>>>
>>> Right as I hit enter for the rb message, I noticed the nodes you're
>>> adding are not sorted - please sort them wrt the unit address (@foo)
>>> and retain my tag then
>>>
>>
>> Not sure if I understand you Konrad.. I believe the nodes are already sorted
>> since address (crypto) @1dfa000 > address (cryptobam) @1dc4000? Do let me know what
>> I'm missing.
> 
> 0x01dfa000 > 0x1500000, so no, your nodes are not properly sorted.
> 

Thank you for spotting this folks. I realize that the sorting was correct in v1 of the patch
from Abel. I will revert back to that.

Thanks!
Harshal

>>
>> Thanks,
>> Harshal
>>  
>>> Konrad
>>
>