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Message-Id: <20251211064821.2707001-1-hongxing.zhu@nxp.com>
Date: Thu, 11 Dec 2025 14:48:17 +0800
From: Richard Zhu <hongxing.zhu@....com>
To: robh@...nel.org,
krzk+dt@...nel.org,
conor+dt@...nel.org,
bhelgaas@...gle.com,
frank.li@....com,
l.stach@...gutronix.de,
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mani@...nel.org,
shawnguo@...nel.org,
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Cc: linux-pci@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org,
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Subject: [PATCH v10 0/4] PCI: imx6: Add external reference clock mode support
I'm really sorry to send this version patch-set late, because that I was
engaged in other emergent tasks in the past weeks. And didn't have time
to continue this topic. Now, I have chance to continue doing this again.
Sorry to bring the inconvenience to the patch review.
i.MX95 PCIes have two reference clock inputs: one from internal PLL.
It's wired inside chip and present as "ref" clock. It's not an optional
clock. The other from off chip crystal oscillator. The "extref" clock
refers to a reference clock from an external crystal oscillator through
the CLKIN_N/P pair PADs. It is an optional clock, relied on the board
design.
Add additional optional external reference clock input for i.MX95 PCIes.
Main change in v10:
Thanks for Krzysztof's kindly review.
- Change the miniItem of i.MX95 PCIe clocks from '4' to '5', since the "ref"
clock is not optional. Update the commit message to describe why an
additional optinal external reference clock input is added for i.MX95 PCIe.
- Add a new patch to fix the dtbs_check error after changing the miniItem of
i.MX95 PCIe clocks in timx95-tqma9596sa-mb-smarc-2.dts.
Main change in v9:
Thanks for Conor's kindly review.
- Enlarge the maxItem of clocks for i.MX95 PCIe.
https://lore.kernel.org/imx/20251031031907.1390870-1-hongxing.zhu@nxp.com/
Main change in v8:
- Rebase to v6.18-rc1.
- No need to initialize bool parameter to the deault value "false" refer
to Mani' comments in v7
https://lore.kernel.org/imx/20251024024013.775836-1-hongxing.zhu@nxp.com/
Main change in v7:
- Refine the subjects and commit message refer to Bjorn's comments.
https://lore.kernel.org/imx/20250918032555.3987157-1-hongxing.zhu@nxp.com/
Main change in v6:
- Refer to Krzysztof's comments, let i.MX95 PCIes has the "ref" clock
since it is wired actually, and add one more optional "extref" clock
for i.MX95 PCIes.
https://lore.kernel.org/imx/20250917045238.1048484-1-hongxing.zhu@nxp.com/
Main change in v5:
- Update the commit message of first patch refer to Bjorn's comments.
- Correct the typo error and update the description of property in the
first patch.
https://lore.kernel.org/imx/20250915035348.3252353-1-hongxing.zhu@nxp.com/
Main change in v4:
- Add one more reference clock "extref" to be onhalf the reference clock
that comes from external crystal oscillator.
https://lore.kernel.org/imx/20250626073804.3113757-1-hongxing.zhu@nxp.com/
Main change in v3:
- Update the logic check external reference clock mode is enabled or
not in the driver codes.
https://lore.kernel.org/imx/20250620031350.674442-1-hongxing.zhu@nxp.com/
Main change in v2:
- Fix yamllint warning.
- Refine the driver codes.
https://lore.kernel.org/imx/20250619091004.338419-1-hongxing.zhu@nxp.com/
[PATCH v10 1/4] dt-bindings: PCI: dwc: Add external reference clock
[PATCH v10 2/4] dt-bindings: PCI: pci-imx6: Add external reference
[PATCH v10 3/4] PCI: imx6: Add external reference clock input mode
[PATCH v10 4/4] arm64: dt: imx95: Add the missed ref clock for
Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.yaml | 7 +++++--
Documentation/devicetree/bindings/pci/snps,dw-pcie-common.yaml | 6 ++++++
arch/arm64/boot/dts/freescale/imx95-tqma9596sa-mb-smarc-2.dts | 10 ++++++----
drivers/pci/controller/dwc/pci-imx6.c | 19 ++++++++++++-------
4 files changed, 29 insertions(+), 13 deletions(-)
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