Message-Id: <20251211-siva_mhi_dp2-v1-0-d2895c4ec73a@oss.qualcomm.com>
Date: Thu, 11 Dec 2025 13:37:32 +0530
From: Sivareddy Surasani <sivareddy.surasani@....qualcomm.com>
To: Manivannan Sadhasivam <mani@...nel.org>, Jonathan Corbet <corbet@....net>,
        Arnd Bergmann <arnd@...db.de>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>
Cc: mhi@...ts.linux.dev, linux-arm-msm@...r.kernel.org,
        linux-kernel@...r.kernel.org, linux-doc@...r.kernel.org,
        Upal Kumar Saha <upal.saha@....qualcomm.com>,
        Himanshu Shukla <quic_himashuk@...cinc.com>,
        Sivareddy Surasani <sivareddy.surasani@....qualcomm.com>,
        Vivek Pernamitta <vivek.pernamitta@....qualcomm.com>,
        Krishna Chaitanya Chundru <krishna.chundru@....qualcomm.com>
Subject: [PATCH 00/11] char: qcom_csm_dp: Add data path driver for QDU100
 device

This series introduces a character device driver for the Qualcomm
Cell Site Modem (CSM) Data Path (DP) interface to support the
QDU100 5G distributed unit in cellular base station deployments

The driver enables high-performance communication between an x86
Layer 2 host and the Qualcomm Distributed Unit (QDU100) by
transmitting and receiving FAPI packets over PCIe using the Modem
Host Interface (MHI). The design targets low-latency, high-rate
data movement suitable for real-time 5G workloads.

Key features
------------
 - Provide a character-based interface to userspace and register as
   an MHI client.
 - Implement zero-copy using shared rings and memory pools to avoid
   data copies between user and kernel space, reducing latency and
   increasing throughput.
 - Expose ioctls for memory pool management and packet transmission.
 - Support two DMA channels (control and data) with system
   configuration ensuring correct channel assignment.
 - Add SR-IOV support so QDU100 can present multiple virtual PCIe
   functions to the host, scaling to up to 12 devices with up to 4
   virtual functions per device.

Userspace API(dp-lib)
-------------
The character device exposes ioctls to:
 - create and manage memory pools and shared rings
 - enqueue and dequeue packet buffers for TX/RX
 - configure control vs data channel usage
dp-lib: https://github.com/qualcomm/dp-lib

MHI
-------
Add support to read MHI capabilities. Initial post of MHI
capabilities is referenced here:
https://lore.kernel.org/all/202508181647.7mZJVOr6-lkp@intel.com/

Add data path channels and event rings for QDU100 VFs. Disable
IRQ moderation for hardware channels to improve latency.

IP_HW1: Control configuration procedures over the L1 FAPI P5
interface include initialization, termination, restart, reset,
and error notification. These procedures transition the PHY
layer through IDLE, CONFIGURED, and RUNNING states.

IP_HW2: Data path configuration procedures control DL and UL
frame structures and transfer subframe data between L2/L3
software and PHY. Supported procedures include subframe message
transmission, SFN/SF synchronization, and various transport
channel operations.

Add support for queuing multiple DMA buffers. Optimize MHI
clients by allowing them to queue multiple DMA buffers for a
given transfer without ringing the channel doorbell for every
queue. This avoids unnecessary link access. Introduce the
exported API mhi_queue_n_dma to pass an array of MHI buffers and
MHI flags.

Add support for mhi_poll API. New hardware channel clients use
mhi_poll() to manage their own completion events instead of
relying on the MHI core driver for notifications. Also support
both DL and UL channels in mhi_poll.

Add overflow disable flag for QDU100 hardware channels. When the
client transfers a large packet, the host may set overflow
events if the packet size exceeds the transfer ring element
size. This flag disables overflow events.

Add MHI callback support for channel error notifications. This
allows the client driver to take further action if there is any
issue on the device side.

Introduce a new API to retrieve the length of a transfer ring.
This API allows clients to query the ring length.

Read the MHI capability for MAX TRB length if supported by the
device. Use this information to send MHI data with a higher TRB
length as allowed by the device.

Signed-off-by: Sivareddy Surasani <sivareddy.surasani@....qualcomm.com>
Signed-off-by: Vivek Pernamitta <vivek.pernamitta@....qualcomm.com>
---
Change depends on:
https://lore.kernel.org/all/20251209-vdev_next-20251208_eth_v6-v6-1-80898204f5d8@quicinc.com/

---
Sivareddy Surasani (1):
      char: qcom_csm_dp: Add data path driver for QDU100 device

Vivek Pernamitta (10):
      bus: mhi: host: Add support to read MHI capabilities
      bus: mhi: pci_generic: Add Data plane channels for QDU100 VF's
      bus: mhi: host: Add support for queuing multiple DMA buffers
      Revert "bus: mhi: host: Remove mhi_poll() API"
      bus: mhi: host: Add support for both DL and Ul chan for poll
      bus: mhi: host: pci: Add overflow disable flag for QDU100 H/W channels
      bus: mhi: host: core: Add overflow disable flag
      bus: mhi: MHI CB support for Channel error notification
      bus: mhi: host: Get total descriptor count
      drivers: bus: mhi: host: Add support for MHI MAX TRB capability

 Documentation/misc-devices/qcom_csm_dp.rst     |  138 +++
 drivers/bus/mhi/common.h                       |   26 +-
 drivers/bus/mhi/host/init.c                    |   56 ++
 drivers/bus/mhi/host/internal.h                |    9 +
 drivers/bus/mhi/host/main.c                    |  270 +++++-
 drivers/bus/mhi/host/pci_generic.c             |   59 ++
 drivers/char/Kconfig                           |    2 +
 drivers/char/Makefile                          |    1 +
 drivers/char/qcom_csm_dp/Kconfig               |    9 +
 drivers/char/qcom_csm_dp/Makefile              |    5 +
 drivers/char/qcom_csm_dp/qcom_csm_dp.h         |  173 ++++
 drivers/char/qcom_csm_dp/qcom_csm_dp_cdev.c    |  941 +++++++++++++++++++++
 drivers/char/qcom_csm_dp/qcom_csm_dp_core.c    |  571 +++++++++++++
 drivers/char/qcom_csm_dp/qcom_csm_dp_debugfs.c |  993 ++++++++++++++++++++++
 drivers/char/qcom_csm_dp/qcom_csm_dp_mem.c     | 1078 ++++++++++++++++++++++++
 drivers/char/qcom_csm_dp/qcom_csm_dp_mem.h     |  292 +++++++
 drivers/char/qcom_csm_dp/qcom_csm_dp_mhi.c     |  651 ++++++++++++++
 drivers/char/qcom_csm_dp/qcom_csm_dp_mhi.h     |   81 ++
 include/linux/mhi.h                            |   42 +
 include/uapi/linux/qcom_csm_dp_ioctl.h         |  306 +++++++
 20 files changed, 5674 insertions(+), 29 deletions(-)
---
base-commit: e3b1905d4f5cc4eb39fa7b9fac6b6db3ab1a89e2
change-id: 20251211-siva_mhi_dp2-237c022276a2
prerequisite-change-id: 20251211-siva_eth-ef9b2305b865:v6

Best regards,
--  
Sivareddy Surasani <sivareddy.surasani@....qualcomm.com>

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