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Message-ID: <iweswdjn6owhotezqdrdk5q7c4npazw5mb4zgurpfc3kb4d27b@fdywmzmvbn6d>
Date: Thu, 11 Dec 2025 15:38:02 +0200
From: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
To: Kumari Pallavi <kumari.pallavi@....qualcomm.com>
Cc: kpallavi@....qualcomm.com, srini@...nel.org, amahesh@....qualcomm.com,
        arnd@...db.de, gregkh@...uxfoundation.org, robh@...nel.org,
        krzk+dt@...nel.org, conor+dt@...nel.org, quic_bkumar@...cinc.com,
        ekansh.gupta@....qualcomm.com, linux-kernel@...r.kernel.org,
        quic_chennak@...cinc.com, dri-devel@...ts.freedesktop.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        jingyi.wang@....qualcomm.com, aiqun.yu@....qualcomm.com,
        ktadakam@....qualcomm.com
Subject: Re: [PATCH v6 3/4] misc: fastrpc: Add support for new DSP IOVA
 formatting

On Thu, Dec 11, 2025 at 03:39:32PM +0530, Kumari Pallavi wrote:
> Implement the new IOVA formatting required by the DSP architecture change
> on Kaanapali SoC. Place the SID for DSP DMA transactions at bit 56 in the
> physical address. This placement is necessary for the DSPs to correctly
> identify streams and operate as intended.
> To address this, set SID position to bit 56 via OF matching on the fastrpc
> node; otherwise, default to legacy 32-bit placement.
> This change ensures consistent SID placement across DSPs.
> 
> Signed-off-by: Kumari Pallavi <kumari.pallavi@....qualcomm.com>
> ---
>  drivers/misc/fastrpc.c | 61 ++++++++++++++++++++++++++++++++++++------
>  1 file changed, 53 insertions(+), 8 deletions(-)
> 
> diff --git a/drivers/misc/fastrpc.c b/drivers/misc/fastrpc.c
> index eb9501fe79bc..af92876f1cc1 100644
> --- a/drivers/misc/fastrpc.c
> +++ b/drivers/misc/fastrpc.c
> @@ -22,6 +22,7 @@
>  #include <linux/firmware/qcom/qcom_scm.h>
>  #include <uapi/misc/fastrpc.h>
>  #include <linux/of_reserved_mem.h>
> +#include <linux/bits.h>
>  
>  #define ADSP_DOMAIN_ID (0)
>  #define MDSP_DOMAIN_ID (1)
> @@ -33,7 +34,6 @@
>  #define FASTRPC_ALIGN		128
>  #define FASTRPC_MAX_FDLIST	16
>  #define FASTRPC_MAX_CRCLIST	64
> -#define FASTRPC_PHYS(p)	((p) & 0xffffffff)
>  #define FASTRPC_CTX_MAX (256)
>  #define FASTRPC_INIT_HANDLE	1
>  #define FASTRPC_DSP_UTILITIES_HANDLE	2
> @@ -105,6 +105,23 @@
>  
>  #define miscdev_to_fdevice(d) container_of(d, struct fastrpc_device, miscdev)
>  
> +/* Extract SMMU PA from consolidated IOVA */
> +static inline dma_addr_t fastrpc_ipa_to_dma_addr(dma_addr_t iova, u32 sid_pos)
> +{
> +	if (!sid_pos)
> +		return 0;
> +	return iova & GENMASK_ULL(sid_pos - 1, 0);
> +}
> +
> +/*
> + * Prepare the consolidated iova to send to DSP by prepending the SID
> + * to smmu PA at the appropriate position
> + */
> +static inline u64 fastrpc_compute_sid_offset(u64 sid, u32 sid_pos)
> +{
> +	return sid << sid_pos;
> +}
> +
>  struct fastrpc_phy_page {
>  	dma_addr_t addr;	/* dma address */
>  	u64 size;		/* size of contiguous region */
> @@ -257,6 +274,10 @@ struct fastrpc_session_ctx {
>  	bool valid;
>  };
>  
> +struct fastrpc_soc_data {
> +	u32 sid_pos;
> +};
> +
>  struct fastrpc_channel_ctx {
>  	int domain_id;
>  	int sesscount;
> @@ -278,6 +299,7 @@ struct fastrpc_channel_ctx {
>  	bool secure;
>  	bool unsigned_support;
>  	u64 dma_mask;
> +	const struct fastrpc_soc_data *soc_data;
>  };
>  
>  struct fastrpc_device {
> @@ -390,7 +412,8 @@ static int fastrpc_map_lookup(struct fastrpc_user *fl, int fd,
>  static void fastrpc_buf_free(struct fastrpc_buf *buf)
>  {
>  	dma_free_coherent(buf->dev, buf->size, buf->virt,
> -			  FASTRPC_PHYS(buf->dma_addr));
> +			  fastrpc_ipa_to_dma_addr(buf->dma_addr,
> +						  buf->fl->cctx->soc_data->sid_pos));

fastrpc_ipa_to_dma_addr(fl->ccxtx, buf->dma_addr)

>  	kfree(buf);
>  }
>  
> @@ -440,7 +463,8 @@ static int fastrpc_buf_alloc(struct fastrpc_user *fl, struct device *dev,
>  	buf = *obuf;
>  
>  	if (fl->sctx && fl->sctx->sid)
> -		buf->dma_addr += ((u64)fl->sctx->sid << 32);
> +		buf->dma_addr += fastrpc_compute_sid_offset(fl->sctx->sid,
> +							    fl->cctx->soc_data->sid_pos);

fastrpc_sid_offset(fl->cctx, fl->sctx)

>  
>  	return 0;
>  }
> @@ -685,7 +709,9 @@ static int fastrpc_dma_buf_attach(struct dma_buf *dmabuf,
>  		return -ENOMEM;
>  
>  	ret = dma_get_sgtable(buffer->dev, &a->sgt, buffer->virt,
> -			      FASTRPC_PHYS(buffer->dma_addr), buffer->size);
> +			      fastrpc_ipa_to_dma_addr(buffer->dma_addr,
> +						      buffer->fl->cctx->soc_data->sid_pos),
> +			      buffer->size);
>  	if (ret < 0) {
>  		dev_err(buffer->dev, "failed to get scatterlist from DMA API\n");
>  		kfree(a);
> @@ -734,7 +760,8 @@ static int fastrpc_mmap(struct dma_buf *dmabuf,
>  	dma_resv_assert_held(dmabuf->resv);
>  
>  	return dma_mmap_coherent(buf->dev, vma, buf->virt,
> -				 FASTRPC_PHYS(buf->dma_addr), size);
> +				 fastrpc_ipa_to_dma_addr(buf->dma_addr,
> +							 buf->fl->cctx->soc_data->sid_pos), size);
>  }
>  
>  static const struct dma_buf_ops fastrpc_dma_buf_ops = {
> @@ -747,6 +774,12 @@ static const struct dma_buf_ops fastrpc_dma_buf_ops = {
>  	.release = fastrpc_release,
>  };
>  
> +static dma_addr_t fastrpc_compute_dma_addr(struct fastrpc_user *fl, dma_addr_t sg_dma_addr)
> +{
> +	return sg_dma_addr + fastrpc_compute_sid_offset(fl->sctx->sid,
> +							fl->cctx->soc_data->sid_pos);
> +}
> +
>  static int fastrpc_map_attach(struct fastrpc_user *fl, int fd,
>  			      u64 len, u32 attr, struct fastrpc_map **ppmap)
>  {
> @@ -788,8 +821,7 @@ static int fastrpc_map_attach(struct fastrpc_user *fl, int fd,
>  	if (attr & FASTRPC_ATTR_SECUREMAP) {
>  		map->dma_addr = sg_phys(map->table->sgl);
>  	} else {
> -		map->dma_addr = sg_dma_address(map->table->sgl);
> -		map->dma_addr += ((u64)fl->sctx->sid << 32);
> +		map->dma_addr = fastrpc_compute_dma_addr(fl, sg_dma_address(map->table->sgl));
>  	}

Now you can drop curve brackets around.

>  	for_each_sg(map->table->sgl, sgl, map->table->nents,
>  		sgl_index)

-- 
With best wishes
Dmitry

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