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Message-ID: <20251211194756.234043-1-ivecera@redhat.com>
Date: Thu, 11 Dec 2025 20:47:43 +0100
From: Ivan Vecera <ivecera@...hat.com>
To: netdev@...r.kernel.org,
Andrew Lunn <andrew+netdev@...n.ch>,
"David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>,
Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>,
Grzegorz Nitka <grzegorz.nitka@...el.com>,
Jiri Pirko <jiri@...nulli.us>,
Petr Oros <poros@...hat.com>,
Michal Schmidt <mschmidt@...hat.com>,
Prathosh Satish <Prathosh.Satish@...rochip.com>,
Tony Nguyen <anthony.l.nguyen@...el.com>,
Przemek Kitszel <przemyslaw.kitszel@...el.com>,
Saeed Mahameed <saeedm@...dia.com>,
Leon Romanovsky <leon@...nel.org>,
Tariq Toukan <tariqt@...dia.com>,
Mark Bloch <mbloch@...dia.com>,
Richard Cochran <richardcochran@...il.com>,
Jonathan Lemon <jonathan.lemon@...il.com>,
Simon Horman <horms@...nel.org>,
Alexander Lobakin <aleksander.lobakin@...el.com>,
Willem de Bruijn <willemb@...gle.com>,
Stefan Wahren <wahrenst@....net>,
devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org,
intel-wired-lan@...ts.osuosl.org,
linux-rdma@...r.kernel.org
Subject: [PATCH RFC net-next 00/13] dpll: Core improvements and ice E825-C SyncE support
This series introduces Synchronous Ethernet (SyncE) support for
the Intel E825-C Ethernet controller. Unlike previous generations where
DPLL connections were implicitly assumed, the E825-C architecture relies
on the platform firmware to describe the physical connections between
the network controller and external DPLLs (such as the ZL3073x).
To accommodate this, the series extends the DPLL subsystem to support
firmware node (fwnode) associations, asynchronous discovery via notifiers,
and dynamic pin management. Additionally, a significant refactor of
the DPLL reference counting logic is included to ensure robustness and
debuggability.
DPLL Core Extensions:
* Firmware Node Support: Pins can now be registered with an associated
struct fwnode_handle. This allows consumer drivers to lookup pins based
on device properties (dpll-pins).
* Asynchronous Notifiers: A raw notifier chain is added to the DPLL core.
This allows the network driver (ice driver in this series) to subscribe
to events and react when the platform DPLL driver registers the parent
pins, resolving probe ordering dependencies.
* Dynamic Indexing: Drivers can now request DPLL_PIN_IDX_UNSPEC to have
the core automatically allocate a unique pin index, simplifying driver
implementation for virtual or non-indexed pins.
Reference Counting & Debugging:
* Refactor: The reference counting logic in the core is consolidated.
Internal list management helpers now automatically handle hold/put
operations, removing fragile open-coded logic in the registration paths.
* Duplicate Checks: The core now strictly rejects duplicate registration
attempts for the same pin/device context.
* Reference Tracking: A new Kconfig option DPLL_REFCNT_TRACKER is added
(using the kernel's REF_TRACKER infrastructure). This allows developers
to instrument and debug reference leaks by recording stack traces for
every get/put operation.
Driver Updates:
* zl3073x: Updated to register pins with their firmware nodes and support
the 'mux' pin type.
* ice: Implements the E825-C specific hardware configuration for SyncE
(CGU registers). It utilizes the new notifier and fwnode APIs to
dynamically discover and attach to the platform DPLLs.
Patch Summary:
* Patch 1-3:
DT bindings and helper functions for finding DPLL pins via fwnode.
* Patch 4:
Updates zl3073x to register pins with fwnode.
* Patch 5-6:
Adds notifiers and dynamic pin index allocation to DPLL core.
* Patch 7:
Adds 'mux' pin type support to zl3073x.
* Patch 8-9:
Refactors DPLL core refcounting and adds duplicate registration checks.
* Patch 10-12:
Adds REF_TRACKER infrastructure and updates drivers (zl3073x, ice) to
support it.
* Patch 13:
Implements the E825-C SyncE logic in the ice driver using the new
infrastructure.
Arkadiusz Kubalewski (1):
ice: dpll: Support E825-C SyncE and dynamic pin discovery
Ivan Vecera (11):
dt-bindings: net: ethernet-controller: Add DPLL pin properties
dpll: Allow registering pin with firmware node
net: eth: Add helpers to find DPLL pin firmware node
dpll: zl3073x: register pins with fwnode handle
dpll: Support dynamic pin index allocation
dpll: zl3073x: Add support for mux pin type
dpll: Enhance and consolidate reference counting logic
dpll: Prevent duplicate registrations
dpll: Add reference count tracking support
dpll: zl3073x: Enable reference count tracking
ice: dpll: Enable reference count tracking
Petr Oros (1):
dpll: Add notifier chain for dpll events
.../bindings/net/ethernet-controller.yaml | 13 +
drivers/dpll/Kconfig | 15 +
drivers/dpll/dpll_core.c | 290 ++++-
drivers/dpll/dpll_core.h | 11 +
drivers/dpll/dpll_netlink.c | 6 +
drivers/dpll/zl3073x/dpll.c | 15 +-
drivers/dpll/zl3073x/dpll.h | 1 +
drivers/dpll/zl3073x/prop.c | 2 +
drivers/net/ethernet/intel/ice/ice_dpll.c | 995 ++++++++++++++++--
drivers/net/ethernet/intel/ice/ice_dpll.h | 33 +
drivers/net/ethernet/intel/ice/ice_lib.c | 3 +
drivers/net/ethernet/intel/ice/ice_ptp.c | 29 +
drivers/net/ethernet/intel/ice/ice_ptp_hw.c | 9 +-
drivers/net/ethernet/intel/ice/ice_ptp_hw.h | 1 +
drivers/net/ethernet/intel/ice/ice_tspll.c | 223 ++++
drivers/net/ethernet/intel/ice/ice_tspll.h | 14 +-
drivers/net/ethernet/intel/ice/ice_type.h | 6 +
.../net/ethernet/mellanox/mlx5/core/dpll.c | 13 +-
drivers/ptp/ptp_ocp.c | 16 +-
include/linux/dpll.h | 58 +-
include/linux/etherdevice.h | 4 +
net/ethernet/eth.c | 20 +
22 files changed, 1616 insertions(+), 161 deletions(-)
--
2.51.2
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