lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <08A08E3A-0EEF-4FE3-B038-04300E2A5E3A@redhat.com>
Date: Sun, 14 Dec 2025 20:30:56 +0100
From: Ivan Vecera <ivecera@...hat.com>
To: "Loktionov, Aleksandr" <aleksandr.loktionov@...el.com>,
 "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
 Andrew Lunn <andrew+netdev@...n.ch>, "David S. Miller" <davem@...emloft.net>,
 Eric Dumazet <edumazet@...gle.com>, Jakub Kicinski <kuba@...nel.org>,
 Paolo Abeni <pabeni@...hat.com>, Rob Herring <robh@...nel.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley <conor+dt@...nel.org>,
 Vadim Fedorenko <vadim.fedorenko@...ux.dev>,
 "Kubalewski, Arkadiusz" <arkadiusz.kubalewski@...el.com>,
 "Nitka, Grzegorz" <grzegorz.nitka@...el.com>, Jiri Pirko <jiri@...nulli.us>,
 "Oros, Petr" <poros@...hat.com>, "Schmidt, Michal" <mschmidt@...hat.com>,
 Prathosh Satish <Prathosh.Satish@...rochip.com>,
 "Nguyen, Anthony L" <anthony.l.nguyen@...el.com>,
 "Kitszel, Przemyslaw" <przemyslaw.kitszel@...el.com>,
 Saeed Mahameed <saeedm@...dia.com>, Leon Romanovsky <leon@...nel.org>,
 Tariq Toukan <tariqt@...dia.com>, Mark Bloch <mbloch@...dia.com>,
 Richard Cochran <richardcochran@...il.com>,
 Jonathan Lemon <jonathan.lemon@...il.com>, Simon Horman <horms@...nel.org>,
 "Lobakin, Aleksander" <aleksander.lobakin@...el.com>,
 Willem de Bruijn <willemb@...gle.com>, Stefan Wahren <wahrenst@....net>,
 "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
 "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
 "intel-wired-lan@...ts.osuosl.org" <intel-wired-lan@...ts.osuosl.org>,
 "linux-rdma@...r.kernel.org" <linux-rdma@...r.kernel.org>
Subject: RE: [Intel-wired-lan] [PATCH RFC net-next 13/13] ice: dpll: Support E825-C SyncE and dynamic pin discovery



On December 12, 2025 11:20:43 AM GMT+01:00, "Loktionov, Aleksandr" <aleksandr.loktionov@...el.com> wrote:
>
>
>> -----Original Message-----
>> From: Intel-wired-lan <intel-wired-lan-bounces@...osl.org> On Behalf
>> Of Ivan Vecera
>> Sent: Thursday, December 11, 2025 8:48 PM
>> To: netdev@...r.kernel.org; Andrew Lunn <andrew+netdev@...n.ch>;
>> David S. Miller <davem@...emloft.net>; Eric Dumazet
>> <edumazet@...gle.com>; Jakub Kicinski <kuba@...nel.org>; Paolo Abeni
>> <pabeni@...hat.com>; Rob Herring <robh@...nel.org>; Krzysztof
>> Kozlowski <krzk+dt@...nel.org>; Conor Dooley <conor+dt@...nel.org>;
>> Vadim Fedorenko <vadim.fedorenko@...ux.dev>; Kubalewski, Arkadiusz
>> <arkadiusz.kubalewski@...el.com>; Nitka, Grzegorz
>> <grzegorz.nitka@...el.com>; Jiri Pirko <jiri@...nulli.us>; Oros,
>> Petr <poros@...hat.com>; Schmidt, Michal <mschmidt@...hat.com>;
>> Prathosh Satish <Prathosh.Satish@...rochip.com>; Nguyen, Anthony L
>> <anthony.l.nguyen@...el.com>; Kitszel, Przemyslaw
>> <przemyslaw.kitszel@...el.com>; Saeed Mahameed <saeedm@...dia.com>;
>> Leon Romanovsky <leon@...nel.org>; Tariq Toukan <tariqt@...dia.com>;
>> Mark Bloch <mbloch@...dia.com>; Richard Cochran
>> <richardcochran@...il.com>; Jonathan Lemon
>> <jonathan.lemon@...il.com>; Simon Horman <horms@...nel.org>;
>> Lobakin, Aleksander <aleksander.lobakin@...el.com>; Willem de Bruijn
>> <willemb@...gle.com>; Stefan Wahren <wahrenst@....net>;
>> devicetree@...r.kernel.org; linux-kernel@...r.kernel.org; intel-
>> wired-lan@...ts.osuosl.org; linux-rdma@...r.kernel.org
>> Subject: [Intel-wired-lan] [PATCH RFC net-next 13/13] ice: dpll:
>> Support E825-C SyncE and dynamic pin discovery
>> 
>> From: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>
>> 
>> Add DPLL support for the Intel E825-C Ethernet controller. Unlike
>> previous
>> generations (E810), the E825-C connects to the platform's DPLL
>> subsystem
>> via MUX pins defined in the system firmware (Device Tree/ACPI).
>> 
>> Implement the following mechanisms to support this architecture:
>> 
>> 1. Dynamic Pin Discovery: Use the fwnode_dpll_pin_find() helper to
>>    locate the parent MUX pins defined in the firmware.
>> 
>> 2. Asynchronous Registration: Since the platform DPLL driver may
>> probe
>>    independently of the network driver, utilize the DPLL notifier
>> chain
>>    (register_dpll_notifier). The driver listens for DPLL_PIN_CREATED
>>    events to detect when the parent MUX pins become available, then
>>    registers its own Recovered Clock (RCLK) and PTP (1588) pins as
>> children
>>    of those parents.
>> 
>> 3. Hardware Configuration: Implement the specific register access
>> logic
>>    for E825-C CGU (Clock Generation Unit) registers (R10, R11). This
>>    includes configuring the bypass MUXes and clock dividers required
>> to
>>    drive SyncE and PTP signals.
>> 
>> 4. Split Initialization: Refactor `ice_dpll_init()` to separate the
>>    static initialization path of E810 from the dynamic, firmware-
>> driven
>>    path required for E825-C.
>> 
>> Co-developed-by: Ivan Vecera <ivecera@...hat.com>
>> Co-developed-by: Grzegorz Nitka <grzegorz.nitka@...el.com>
>> Signed-off-by: Ivan Vecera <ivecera@...hat.com>
>> Signed-off-by: Grzegorz Nitka <grzegorz.nitka@...el.com>
>> Signed-off-by: Arkadiusz Kubalewski <arkadiusz.kubalewski@...el.com>
>> ---
>>  drivers/net/ethernet/intel/ice/ice_dpll.c   | 964
>> ++++++++++++++++++--
>>  drivers/net/ethernet/intel/ice/ice_dpll.h   |  29 +
>>  drivers/net/ethernet/intel/ice/ice_lib.c    |   3 +
>>  drivers/net/ethernet/intel/ice/ice_ptp.c    |  29 +
>>  drivers/net/ethernet/intel/ice/ice_ptp_hw.c |   9 +-
>>  drivers/net/ethernet/intel/ice/ice_ptp_hw.h |   1 +
>>  drivers/net/ethernet/intel/ice/ice_tspll.c  | 223 +++++
>>  drivers/net/ethernet/intel/ice/ice_tspll.h  |  14 +-
>>  drivers/net/ethernet/intel/ice/ice_type.h   |   6 +
>>  9 files changed, 1188 insertions(+), 90 deletions(-)
>> 
>> diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c
>
>...
>
>> +static int
>> +ice_dpll_pin_get_parent_num(struct ice_dpll_pin *pin,
>> +			    const struct dpll_pin *parent)
>> +{
>> +	int i;
>> +
>> +	for (i = 0; pin->num_parents; i++)
>> +		if (pin->pf->dplls.inputs[pin->parent_idx[i]].pin ==
>> parent)
>Oh, no! we don't need a 2nd Infinite Loop in Cupertino!

Oops, thanks for pointing out... During testing the parent
was always found so this didn't cause any problem.

Of course I will fix it. 😉
>
>...
>
>
>> --
>> 2.51.2
>


Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ