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Message-ID: <1801063954.177813.1765897665357@app.mailbox.org>
Date: Tue, 16 Dec 2025 07:07:45 -0800 (PST)
From: vdso@...lbox.org
To: Anirudh Rayabharam <anirudh@...rudhrb.com>
Cc: kys@...rosoft.com, decui@...rosoft.com, haiyangz@...rosoft.com,
linux-kernel@...r.kernel.org, longli@...rosoft.com,
wei.liu@...nel.org, linux-hyperv@...r.kernel.org
Subject: Re: [PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts
> On 12/16/2025 6:20 AM Anirudh Rayabharam <anirudh@...rudhrb.com> wrote:
[...]
> +#if IS_ENABLED(CONFIG_ARM64)
> +union hv_arm64_vp_execution_state {
> + u16 as_uint16;
> + struct {
> + u16 cpl:2;
That looks oddly x86(-64)-specific (Current Priviledge Level).
Unless I'm mistaken, CPL doesn't belong here, and the bitfield isn't
used on ARM64. Provided the layout of the struct is correct, the
bitfield can have a better name of `reserved0` or something like that.
> + u16 debug_active:1;
> + u16 interruption_pending:1;
> + u16 vtl:4;
> + u16 virtualization_fault_active:1;
> + u16 reserved:7;
> + } __packed;
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