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Message-ID: <19c0f063-94ab-480a-8322-b182164512f4@oracle.com>
Date: Tue, 16 Dec 2025 22:32:51 +0530
From: ALOK TIWARI <alok.a.tiwari@...cle.com>
To: Osose Itua <osose.itua@...oirfairelinux.com>,
        netdev <netdev@...r.kernel.org>
Cc: devicetree <devicetree@...r.kernel.org>,
        linux-kernel <linux-kernel@...r.kernel.org>,
        Michael Hennerich <michael.hennerich@...log.com>,
        Jérôme Oufella <jerome.oufella@...oirfairelinux.com>
Subject: Re: [External] : [PATCH 1/2] net: phy: adin: enable configuration of
 the LP Termination Register



On 12/16/2025 9:18 PM, Osose Itua wrote:
>  From 9c68d9082a9c0550891f24c5902c1f0de15de949 Mon Sep 17 00:00:00 2001
> From: Osose Itua <osose.itua@...oirfairelinux.com>
> Date: Fri, 14 Nov 2025 17:00:14 -0500
> Subject: [PATCH 1/2] net: phy: adin: enable configuration of the LP
>   Termination Register

Double space between LP Termination.

> 
> The ADIN1200/ADIN1300 provide a control bit that selects between normal
> receive termination and the lowest common mode impedance for 100BASE-TX
> operation. This behavior is controlled through the Low Power Termination
> register (B_100_ZPTM_EN_DIMRX).
> 
> Bit 0 of this register enables normal termination when set (this is the
> default), and selects the lowest common mode impedance when cleared.
> 
> Signed-off-by: Osose Itua <osose.itua@...oirfairelinux.com>
> ---
>   drivers/net/phy/adin.c | 32 ++++++++++++++++++++++++++++++++
>   1 file changed, 32 insertions(+)
> 
> diff --git a/drivers/net/phy/adin.c b/drivers/net/phy/adin.c
> index 7fa713ca8d45..2969480a7be3 100644
> --- a/drivers/net/phy/adin.c
> +++ b/drivers/net/phy/adin.c
> @@ -89,6 +89,9 @@
>   #define ADIN1300_CLOCK_STOP_REG			0x9400
>   #define ADIN1300_LPI_WAKE_ERR_CNT_REG		0xa000
>   
> +#define ADIN1300_B_100_ZPTM_DIMRX		0xB685
> +#define ADIN1300_B_100_ZPTM_EN_DIMRX		BIT(0)
> +
>   #define ADIN1300_CDIAG_RUN			0xba1b
>   #define   ADIN1300_CDIAG_RUN_EN			BIT(0)
>   
> @@ -522,6 +525,31 @@ static int adin_config_clk_out(struct phy_device *phydev)
>   			      ADIN1300_GE_CLK_CFG_MASK, sel);
>   }
>   
> +static int adin_config_zptm100(struct phy_device *phydev)
> +{
> +	struct device *dev = &phydev->mdio.dev;
> +	u8 reg;
> +	int rc;
> +
> +	if (!(device_property_read_bool(dev, "adi,low-cmode-impedance")))
> +		return 0;
> +
> +	/* set to 0 to configure for lowest common-mode impedance */
> +	rc = phy_write_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_B_100_ZPTM_DIMRX, 0x0);
> +	if (rc < 0)
> +		return rc;
> +
> +	reg = phy_read_mmd(phydev, MDIO_MMD_VEND1, ADIN1300_B_100_ZPTM_DIMRX);

phy_read_mmd return int, but u8 reg
reg < 0 will never be true

> +	if (reg < 0)
> +		return reg;
> +
> +	if (reg != 0x0)
> +		phydev_err(phydev,
> +			   "Lowest common-mode impedance configuration failed\n");
> +
> +	return 0;
> +}
> +
>   static int adin_config_init(struct phy_device *phydev)
>   {
>   	int rc;
> @@ -548,6 +576,10 @@ static int adin_config_init(struct phy_device *phydev)
>   	if (rc < 0)
>   		return rc;
>   
> +	rc = adin_config_zptm100(phydev);
> +	if (rc < 0)
> +		return rc;
> +
>   	phydev_dbg(phydev, "PHY is using mode '%s'\n",
>   		   phy_modes(phydev->interface));
>   
> 


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