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Message-ID: <20251216224834.ondmgo4av5vn24qg@skbuf>
Date: Wed, 17 Dec 2025 00:48:34 +0200
From: Vladimir Oltean <olteanv@...il.com>
To: Daniel Golle <daniel@...rotopia.org>
Cc: Andrew Lunn <andrew@...n.ch>, "David S. Miller" <davem@...emloft.net>,
Eric Dumazet <edumazet@...gle.com>,
Jakub Kicinski <kuba@...nel.org>, Paolo Abeni <pabeni@...hat.com>,
Rob Herring <robh@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
Conor Dooley <conor+dt@...nel.org>,
Heiner Kallweit <hkallweit1@...il.com>,
Russell King <linux@...linux.org.uk>,
Simon Horman <horms@...nel.org>, netdev@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Frank Wunderlich <frankwu@....de>, Chad Monroe <chad@...roe.io>,
Cezary Wilmanski <cezary.wilmanski@...ran.com>,
Avinash Jayaraman <ajayaraman@...linear.com>,
Bing tao Xu <bxu@...linear.com>, Liang Xu <lxu@...linear.com>,
Juraj Povazanec <jpovazanec@...linear.com>,
"Fanni (Fang-Yi) Chan" <fchan@...linear.com>,
"Benny (Ying-Tsan) Weng" <yweng@...linear.com>,
"Livia M. Rosu" <lrosu@...linear.com>,
John Crispin <john@...ozen.org>
Subject: Re: [PATCH RFC net-next v3 1/4] dt-bindings: net: dsa: add bindings
for MaxLinear MxL862xx
On Mon, Dec 15, 2025 at 12:11:22AM +0000, Daniel Golle wrote:
> +examples:
> + - |
> + mdio {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + switch@0 {
> + compatible = "maxlinear,mxl86282";
> + reg = <0>;
> +
> + ethernet-ports {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + port@0 {
> + reg = <0>;
> + label = "lan1";
Please remove port labels from the example.
> + phy-handle = <&phy0>;
> + phy-mode = "internal";
> + };
> +
> + port@1 {
> + reg = <1>;
> + label = "lan2";
> + phy-handle = <&phy1>;
> + phy-mode = "internal";
> + };
> +
> + port@2 {
> + reg = <2>;
> + label = "lan3";
> + phy-handle = <&phy2>;
> + phy-mode = "internal";
> + };
> +
> + port@3 {
> + reg = <3>;
> + label = "lan4";
> + phy-handle = <&phy3>;
> + phy-mode = "internal";
> + };
> +
> + port@4 {
> + reg = <4>;
> + label = "lan5";
> + phy-handle = <&phy4>;
> + phy-mode = "internal";
> + };
> +
> + port@5 {
> + reg = <5>;
> + label = "lan6";
> + phy-handle = <&phy5>;
> + phy-mode = "internal";
> + };
> +
> + port@6 {
> + reg = <6>;
> + label = "lan7";
> + phy-handle = <&phy6>;
> + phy-mode = "internal";
> + };
> +
> + port@7 {
> + reg = <7>;
> + label = "lan8";
> + phy-handle = <&phy7>;
> + phy-mode = "internal";
> + };
> +
> + port@8 {
> + reg = <8>;
> + label = "cpu";
> + ethernet = <&gmac0>;
> + phy-mode = "usxgmii";
> +
> + fixed-link {
> + speed = <10000>;
> + full-duplex;
> + };
> + };
> + };
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