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Message-ID: <20251216231535.dfalfr2rngeyd72g@synopsys.com>
Date: Tue, 16 Dec 2025 23:15:37 +0000
From: Thinh Nguyen <Thinh.Nguyen@...opsys.com>
To: Rob Herring <robh@...nel.org>
CC: "adrianhoyin.ng@...era.com" <adrianhoyin.ng@...era.com>,
"gregkh@...uxfoundation.org" <gregkh@...uxfoundation.org>,
"krzk+dt@...nel.org" <krzk+dt@...nel.org>,
"conor+dt@...nel.org" <conor+dt@...nel.org>,
"dinguyen@...nel.org" <dinguyen@...nel.org>,
Thinh Nguyen <Thinh.Nguyen@...opsys.com>,
"devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
"linux-usb@...r.kernel.org" <linux-usb@...r.kernel.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH v2 4/4] usb: dwc3: Add support for Agilex5 in
dwc3-generic-platform driver
On Tue, Dec 09, 2025, Rob Herring wrote:
> On Tue, Dec 09, 2025 at 02:25:11PM +0800, adrianhoyin.ng@...era.com wrote:
> > From: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
> >
> > Adds support for Agilex5 in the dwc3-generic-platform driver. Extends
> > generic driver to support configurable driver data to enable dwc3 core
> > property configuration from glue driver.
> >
> > Agilex5 DWC3 wrapper has a 40-bit DMA address bus limitation. When SMMU
> > is enabled, using the default 64-bit DMA mask can cause DMA addresses to
> > be truncated, leading to translation faults.
> >
> > This patch adds a `dma_addressable_bits` field in struct dwc3, allowing
> > the glue driver to set a 40-bit DMA mask during probe.
> >
> > Signed-off-by: Adrian Ng Ho Yin <adrianhoyin.ng@...era.com>
> > ---
> > drivers/usb/dwc3/core.c | 6 +++++-
> > drivers/usb/dwc3/core.h | 5 +++++
> > drivers/usb/dwc3/dwc3-generic-plat.c | 20 +++++++++++++++++++-
> > 3 files changed, 29 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/usb/dwc3/core.c b/drivers/usb/dwc3/core.c
> > index ae140c356295..1fca55637844 100644
> > --- a/drivers/usb/dwc3/core.c
> > +++ b/drivers/usb/dwc3/core.c
> > @@ -2243,7 +2243,11 @@ int dwc3_core_probe(const struct dwc3_probe_data *data)
> >
> > if (!dwc->sysdev_is_parent &&
> > DWC3_GHWPARAMS0_AWIDTH(dwc->hwparams.hwparams0) == 64) {
> > - ret = dma_set_mask_and_coherent(dwc->sysdev, DMA_BIT_MASK(64));
> > + if (!dwc->dma_addressable_bits)
> > + dwc->dma_addressable_bits = 64;
> > +
> > + ret = dma_set_mask_and_coherent(dwc->sysdev,
> > + DMA_BIT_MASK(dwc->dma_addressable_bits));
> > if (ret)
> > goto err_disable_clks;
> > }
> > diff --git a/drivers/usb/dwc3/core.h b/drivers/usb/dwc3/core.h
> > index a5fc92c4ffa3..a09800fe6577 100644
> > --- a/drivers/usb/dwc3/core.h
> > +++ b/drivers/usb/dwc3/core.h
> > @@ -1180,6 +1180,10 @@ struct dwc3_glue_ops {
> > * @wakeup_pending_funcs: Indicates whether any interface has requested for
> > * function wakeup in bitmap format where bit position
> > * represents interface_id.
> > + * @dma_addressable_bits: The number of address bits the device can drive on
> > + * the DMA bus. The driver uses this value to program DMA masks and
> > + * ensure DMA buffers are allocated within the device’s reachable
> > + * address space.
> > */
> > struct dwc3 {
> > struct work_struct drd_work;
> > @@ -1414,6 +1418,7 @@ struct dwc3 {
> > struct dentry *debug_root;
> > u32 gsbuscfg0_reqinfo;
> > u32 wakeup_pending_funcs;
> > + u32 dma_addressable_bits;
> > };
> >
> > #define INCRX_BURST_MODE 0
> > diff --git a/drivers/usb/dwc3/dwc3-generic-plat.c b/drivers/usb/dwc3/dwc3-generic-plat.c
> > index d96b20570002..e9650df6cf81 100644
> > --- a/drivers/usb/dwc3/dwc3-generic-plat.c
> > +++ b/drivers/usb/dwc3/dwc3-generic-plat.c
> > @@ -20,6 +20,11 @@ struct dwc3_generic {
> > struct reset_control *resets;
> > };
> >
> > +struct dwc3_generic_config {
> > + u32 flags;
> > +};
> > +
> > +#define DWC3_HAS_40BIT_DMA_QUIRK BIT(0)
>
> Quirk flags are good, but if we have 10 different address sizes that's
> 10 flags. Just make a dma_addressable_bits field here too, and then it
> is just a straight assignment.
>
Right, don't create new quirk flag for this. Pass as a dwc3 property to
the core.
See how that is done here:
https://lore.kernel.org/linux-usb/20251112055346.1655-1-caohang@eswincomputing.com/
However, I don't think the above is applied to mainline yet.
BR,
Thinh
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