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Message-ID: <202512161441.xlMhHxvl-lkp@intel.com>
Date: Tue, 16 Dec 2025 14:29:29 +0800
From: kernel test robot <lkp@...el.com>
To: Mukesh Kumar Chaurasiya <mkchauras@...ux.ibm.com>, maddy@...ux.ibm.com,
mpe@...erman.id.au, npiggin@...il.com, christophe.leroy@...roup.eu,
oleg@...hat.com, kees@...nel.org, luto@...capital.net,
wad@...omium.org, mchauras@...ux.ibm.com, thuth@...hat.com,
sshegde@...ux.ibm.com, charlie@...osinc.com, macro@...am.me.uk,
akpm@...ux-foundation.org, ldv@...ace.io, deller@....de,
ankur.a.arora@...cle.com, segher@...nel.crashing.org,
tglx@...utronix.de, thomas.weissschuh@...utronix.de,
peterz@...radead.org, menglong8.dong@...il.com,
bigeasy@...utronix.de, namcao@...utronix.de, mingo@...nel.org,
atrajeev@...ux.vnet.ibm.com, mark.barnett@....com,
linuxppc-dev@...ts.ozlabs.org, linux-kernel@...r.kernel.org
Cc: oe-kbuild-all@...ts.linux.dev
Subject: Re: [PATCH v2 7/8] powerpc: Enable IRQ generic entry/exit path.
Hi Mukesh,
kernel test robot noticed the following build warnings:
[auto build test WARNING on powerpc/next]
[also build test WARNING on powerpc/fixes linus/master v6.19-rc1]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]
url: https://github.com/intel-lab-lkp/linux/commits/Mukesh-Kumar-Chaurasiya/powerpc-rename-arch_irq_disabled_regs/20251214-210813
base: https://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux.git next
patch link: https://lore.kernel.org/r/20251214130245.43664-8-mkchauras%40linux.ibm.com
patch subject: [PATCH v2 7/8] powerpc: Enable IRQ generic entry/exit path.
config: powerpc-randconfig-r072-20251215 (https://download.01.org/0day-ci/archive/20251216/202512161441.xlMhHxvl-lkp@intel.com/config)
compiler: powerpc-linux-gcc (GCC) 8.5.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@...el.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202512161441.xlMhHxvl-lkp@intel.com/
smatch warnings:
arch/powerpc/include/asm/entry-common.h:433 arch_enter_from_user_mode() warn: inconsistent indenting
vim +433 arch/powerpc/include/asm/entry-common.h
2b0f05f77f11f8 Mukesh Kumar Chaurasiya 2025-12-14 396
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 397 static __always_inline void arch_enter_from_user_mode(struct pt_regs *regs)
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 398 {
37ad0d88d9bff7 Mukesh Kumar Chaurasiya 2025-12-14 399 kuap_lock();
37ad0d88d9bff7 Mukesh Kumar Chaurasiya 2025-12-14 400
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 401 if (IS_ENABLED(CONFIG_PPC_IRQ_SOFT_MASK_DEBUG))
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 402 BUG_ON(irq_soft_mask_return() != IRQS_ALL_DISABLED);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 403
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 404 BUG_ON(regs_is_unrecoverable(regs));
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 405 BUG_ON(!user_mode(regs));
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 406 BUG_ON(regs_irqs_disabled(regs));
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 407
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 408 #ifdef CONFIG_PPC_PKEY
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 409 if (mmu_has_feature(MMU_FTR_PKEY) && trap_is_syscall(regs)) {
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 410 unsigned long amr, iamr;
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 411 bool flush_needed = false;
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 412 /*
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 413 * When entering from userspace we mostly have the AMR/IAMR
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 414 * different from kernel default values. Hence don't compare.
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 415 */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 416 amr = mfspr(SPRN_AMR);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 417 iamr = mfspr(SPRN_IAMR);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 418 regs->amr = amr;
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 419 regs->iamr = iamr;
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 420 if (mmu_has_feature(MMU_FTR_KUAP)) {
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 421 mtspr(SPRN_AMR, AMR_KUAP_BLOCKED);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 422 flush_needed = true;
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 423 }
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 424 if (mmu_has_feature(MMU_FTR_BOOK3S_KUEP)) {
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 425 mtspr(SPRN_IAMR, AMR_KUEP_BLOCKED);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 426 flush_needed = true;
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 427 }
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 428 if (flush_needed)
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 429 isync();
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 430 } else
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 431 #endif
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 432 kuap_assert_locked();
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 @433 booke_restore_dbcr0();
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 434 account_cpu_user_entry();
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 435 account_stolen_time();
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 436
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 437 /*
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 438 * This is not required for the syscall exit path, but makes the
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 439 * stack frame look nicer. If this was initialised in the first stack
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 440 * frame, or if the unwinder was taught the first stack frame always
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 441 * returns to user with IRQS_ENABLED, this store could be avoided!
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 442 */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 443 irq_soft_mask_regs_set_state(regs, IRQS_ENABLED);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 444
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 445 /*
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 446 * If system call is called with TM active, set _TIF_RESTOREALL to
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 447 * prevent RFSCV being used to return to userspace, because POWER9
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 448 * TM implementation has problems with this instruction returning to
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 449 * transactional state. Final register values are not relevant because
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 450 * the transaction will be aborted upon return anyway. Or in the case
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 451 * of unsupported_scv SIGILL fault, the return state does not much
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 452 * matter because it's an edge case.
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 453 */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 454 if (IS_ENABLED(CONFIG_PPC_TRANSACTIONAL_MEM) &&
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 455 unlikely(MSR_TM_TRANSACTIONAL(regs->msr)))
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 456 set_bits(_TIF_RESTOREALL, ¤t_thread_info()->flags);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 457
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 458 /*
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 459 * If the system call was made with a transaction active, doom it and
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 460 * return without performing the system call. Unless it was an
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 461 * unsupported scv vector, in which case it's treated like an illegal
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 462 * instruction.
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 463 */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 464 #ifdef CONFIG_PPC_TRANSACTIONAL_MEM
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 465 if (unlikely(MSR_TM_TRANSACTIONAL(regs->msr)) &&
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 466 !trap_is_unsupported_scv(regs)) {
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 467 /* Enable TM in the kernel, and disable EE (for scv) */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 468 hard_irq_disable();
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 469 mtmsr(mfmsr() | MSR_TM);
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 470
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 471 /* tabort, this dooms the transaction, nothing else */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 472 asm volatile(".long 0x7c00071d | ((%0) << 16)"
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 473 :: "r"(TM_CAUSE_SYSCALL | TM_CAUSE_PERSISTENT));
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 474
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 475 /*
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 476 * Userspace will never see the return value. Execution will
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 477 * resume after the tbegin. of the aborted transaction with the
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 478 * checkpointed register state. A context switch could occur
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 479 * or signal delivered to the process before resuming the
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 480 * doomed transaction context, but that should all be handled
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 481 * as expected.
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 482 */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 483 return;
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 484 }
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 485 #endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 486 }
1a5661537226c3 Mukesh Kumar Chaurasiya 2025-12-14 487
--
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https://github.com/intel/lkp-tests/wiki
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