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Message-ID: <9d4c274f-3e4c-49a1-9b2a-a95e9a48a4a6@arm.com>
Date: Tue, 16 Dec 2025 12:43:07 +0000
From: Robin Murphy <robin.murphy@....com>
To: Jun Guo <jun.guo@...tech.com>, peter.chen@...tech.com,
 fugang.duan@...tech.com, robh@...nel.org, krzk+dt@...nel.org,
 conor+dt@...nel.org, vkoul@...nel.org, ychuang3@...oton.com,
 schung@...oton.com
Cc: dmaengine@...r.kernel.org, devicetree@...r.kernel.org,
 linux-kernel@...r.kernel.org, cix-kernel-upstream@...tech.com,
 linux-arm-kernel@...ts.infradead.org, jelly.jia@...tech.com
Subject: Re: [PATCH v2 1/3] dt-bindings: dma: arm-dma350: update DT binding
 docs for cix sky1 SoC

On 2025-12-16 12:30 pm, Jun Guo wrote:
> Add SoC-specific compatible strings to the DT binding documents to support
> cix sky1 SoC.
> 
> When adding support for a new SoC that uses the arm dma controller,
> future contributors should be encouraged to actually add SoC-specific
> compatible strings. The use of the "arm,dma-350" compatible string in
> isolation should be disallowed.

No, you've missed the point - however many channels the hardware 
implements, the DT should list that many interrupt specifiers; it 
doesn't matter whether any of them happen to be the same.

Thanks,
Robin.

> Signed-off-by: Jun Guo <jun.guo@...tech.com>
> ---
>   .../devicetree/bindings/dma/arm,dma-350.yaml  | 31 +++++++++++++------
>   1 file changed, 21 insertions(+), 10 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
> index 429f682f15d8..78bcc7f9aa8b 100644
> --- a/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
> +++ b/Documentation/devicetree/bindings/dma/arm,dma-350.yaml
> @@ -14,7 +14,11 @@ allOf:
>   
>   properties:
>     compatible:
> -    const: arm,dma-350
> +    oneOf:
> +      - items:
> +          - enum:
> +              - cix,sky1-dma-350
> +          - const: arm,dma-350
>   
>     reg:
>       items:
> @@ -22,15 +26,22 @@ properties:
>   
>     interrupts:
>       minItems: 1
> -    items:
> -      - description: Channel 0 interrupt
> -      - description: Channel 1 interrupt
> -      - description: Channel 2 interrupt
> -      - description: Channel 3 interrupt
> -      - description: Channel 4 interrupt
> -      - description: Channel 5 interrupt
> -      - description: Channel 6 interrupt
> -      - description: Channel 7 interrupt
> +    maxItems: 8
> +    description: |
> +      The DMA controller may be configured with separate interrupts for each channel,
> +      or with a single combined interrupt for all channels, depending on the SoC integration.
> +    oneOf:
> +      - items:
> +          - description: Channel 0 interrupt
> +          - description: Channel 1 interrupt
> +          - description: Channel 2 interrupt
> +          - description: Channel 3 interrupt
> +          - description: Channel 4 interrupt
> +          - description: Channel 5 interrupt
> +          - description: Channel 6 interrupt
> +          - description: Channel 7 interrupt
> +      - items:
> +          - description: Combined interrupt shared by all channels
>   
>     "#dma-cells":
>       const: 1


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