[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <176598042865.925447.819427829703405501.robh@kernel.org>
Date: Wed, 17 Dec 2025 08:07:09 -0600
From: "Rob Herring (Arm)" <robh@...nel.org>
To: Jacky Chou <jacky_chou@...eedtech.com>
Cc: Andrew Jeffery <andrew@...id.au>,
Kishon Vijay Abraham I <kishon@...nel.org>,
Neil Armstrong <neil.armstrong@...aro.org>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
Manivannan Sadhasivam <mani@...nel.org>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Krzysztof WilczyĆski <kwilczynski@...nel.org>,
openbmc@...ts.ozlabs.org, Vinod Koul <vkoul@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
linux-phy@...ts.infradead.org, devicetree@...r.kernel.org,
Philipp Zabel <p.zabel@...gutronix.de>, linux-gpio@...r.kernel.org,
linux-aspeed@...ts.ozlabs.org,
Linus Walleij <linus.walleij@...aro.org>, linux-pci@...r.kernel.org,
Joel Stanley <joel@....id.au>, Bjorn Helgaas <bhelgaas@...gle.com>,
Conor Dooley <conor+dt@...nel.org>,
Andrew Jeffery <andrew@...econstruct.com.au>
Subject: Re: [PATCH v7 2/7] dt-bindings: PCI: Add ASPEED PCIe RC support
On Tue, 16 Dec 2025 09:50:01 +0800, Jacky Chou wrote:
> ASPEED AST2600 provides one PCIe RC for Gen2 and AST2700 provides three
> PCIe RC for two Gen4 and one Gen2. All of these RCs have just one root
> port to connect to PCIe device. And also have Mem, I/O access, legacy
> interrupt and MSI.
>
> Signed-off-by: Jacky Chou <jacky_chou@...eedtech.com>
> ---
> .../bindings/pci/aspeed,ast2600-pcie.yaml | 182 +++++++++++++++++++++
> 1 file changed, 182 insertions(+)
>
Reviewed-by: Rob Herring (Arm) <robh@...nel.org>
Powered by blists - more mailing lists