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Message-ID: <CAMOZA0LH4Tsk+x-DWPiF5Cob3BeU3YYdrsF1GUz2B=oM0TgYUA@mail.gmail.com>
Date: Wed, 17 Dec 2025 18:03:29 +0100
From: Luigi Rizzo <lrizzo@...gle.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: LKML <linux-kernel@...r.kernel.org>, x86@...nel.org
Subject: Re: [patch V2 0/3] x86/irq: Bugfix and cleanup for posted MSI interrupts
On Tue, Nov 25, 2025 at 10:50 PM Thomas Gleixner <tglx@...utronix.de> wrote:
>
> A small update to V1 which can be found here:
>
> https://lore.kernel.org/lkml/20251125101912.564125647@linutronix.de
>
> Luigi reported that the retrigger mechanism for posted MSI interrupts is
> broken. That happens because retrigger sends an IPI to the actual allocated
> vector, which is handled correctly, but lacks an EOI. That leaves a stale
> APIC ISR bit around.
>
> The following series addresses this and does some related cleanups in that
> area on top.
What is happening with this series, is there any blocker ?
cheers
luigi
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