[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Message-ID: <875xa5c8lx.ffs@tglx>
Date: Wed, 17 Dec 2025 18:37:46 +0100
From: Thomas Gleixner <tglx@...utronix.de>
To: Luigi Rizzo <lrizzo@...gle.com>
Cc: LKML <linux-kernel@...r.kernel.org>, x86@...nel.org
Subject: Re: [patch V2 0/3] x86/irq: Bugfix and cleanup for posted MSI
interrupts
On Wed, Dec 17 2025 at 18:03, Luigi Rizzo wrote:
> On Tue, Nov 25, 2025 at 10:50 PM Thomas Gleixner <tglx@...utronix.de> wrote:
>>
>> A small update to V1 which can be found here:
>>
>> https://lore.kernel.org/lkml/20251125101912.564125647@linutronix.de
>>
>> Luigi reported that the retrigger mechanism for posted MSI interrupts is
>> broken. That happens because retrigger sends an IPI to the actual allocated
>> vector, which is handled correctly, but lacks an EOI. That leaves a stale
>> APIC ISR bit around.
>>
>> The following series addresses this and does some related cleanups in that
>> area on top.
>
> What is happening with this series, is there any blocker ?
I don't think so. It's probably because people were traveling to Japan
or distracted otherwise. I'll take care of it now.
Thanks,
tglx
Powered by blists - more mailing lists