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Message-ID: <12a601dc6f10$18b46e30$4a1d4a90$@samsung.com>
Date: Wed, 17 Dec 2025 10:16:19 +0530
From: "Alim Akhtar" <alim.akhtar@...sung.com>
To: "'Youngmin Nam'" <youngmin.nam@...sung.com>, <krzk@...nel.org>,
	<s.nawrocki@...sung.com>, <linus.walleij@...aro.org>,
	<peter.griffin@...aro.org>, <semen.protsenko@...aro.org>,
	<ivo.ivanov.ivanov1@...il.com>
Cc: <ryu.real@...sung.com>, <d7271.choe@...sung.com>,
	<shin.son@...sung.com>, <jaewon02.kim@...sung.com>,
	<linux-arm-kernel@...ts.infradead.org>, <linux-samsung-soc@...r.kernel.org>,
	<linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: RE: [PATCH v3 3/5] pinctrl: samsung: add per-bank FLTCON offset to
 EXYNOS9_PIN_BANK_* and fix tables

Hi Youngmin

> -----Original Message-----
> From: Youngmin Nam <youngmin.nam@...sung.com>
> Sent: Tuesday, December 2, 2025 3:06 PM
> To: krzk@...nel.org; s.nawrocki@...sung.com; alim.akhtar@...sung.com;
> linus.walleij@...aro.org; peter.griffin@...aro.org;
> semen.protsenko@...aro.org; ivo.ivanov.ivanov1@...il.com
> Cc: ryu.real@...sung.com; d7271.choe@...sung.com;
> shin.son@...sung.com; jaewon02.kim@...sung.com; linux-arm-
> kernel@...ts.infradead.org; linux-samsung-soc@...r.kernel.org; linux-
> gpio@...r.kernel.org; linux-kernel@...r.kernel.org; Youngmin Nam
> <youngmin.nam@...sung.com>
> Subject: [PATCH v3 3/5] pinctrl: samsung: add per-bank FLTCON offset to
> EXYNOS9_PIN_BANK_* and fix tables
> 
> Several Exynos9-era pin-bank tables were implicitly assuming that the
> filter control (FLTCON) registers are laid out contiguously from the
> EINT base offset. Per the TRMs this is not always true. FLTCON can live
> at a separate per-bank offset, and the current tables cause the driver
> to program the wrong FLTCON addresses for some banks.
> 
> - Extends EXYNOS9_PIN_BANK_EINTG()/EINTW() to take an explicit
>   .eint_fltcon_offset parameter.
> - Updates pin-bank tables with the correct FLTCON offsets for:
>   Exynos2200 (ALIVE/CMGP/HSI1/UFS/HSI1UFS/PERIC0/1/2/VTS),
>   Exynos7870 (ALIVE/DISPAUD/ESE/FSYS/MIF/NFC/TOP/TOUCH),
>   Exynos7885 (ALIVE/DISPAUD/FSYS/TOP),
>   Exynos850  (ALIVE/CMGP/AUD/HSI/CORE/PERI),
>   Exynos990  (ALIVE/CMGP/HSI1/HSI2/PERIC0/1/VTS),
>   Exynos9810 (ALIVE/AUD/CHUB/CMGP/FSYS0/FSYS1/PERIC0/1/VTS),
>   ExynosAuto v9 (ALIVE/AUD/FSYS0/1/2/PERIC0/1),
>   Exynos8890 (ALIVE/AUD/CCORE/ESE/FP/FSYS0/1/NFC/PERIC0/1/TOUCH),
>   Exynos8895 (ALIVE/ABOX/VTS/FSYS0/1/BUSC/PERIC0/1),
>   and FSD (FSYS/PERIC).
> 
> Notes:
> - GS101 already programs per-bank filter control registers. This change
>   aligns the Exynos9 path with that model.
> - Banks without filters (EINTN) are unaffected.
> 
> Signed-off-by: Youngmin Nam <youngmin.nam@...sung.com>
> Reviewed-by: Sam Protsenko <semen.protsenko@...aro.org>
> Tested-by: Sam Protsenko <semen.protsenko@...aro.org>
> ---
Reviewed-by: Alim Akhtar <alim.akhtar@...sung.com>

Tested this series on Exynosautov920 sadk

Tested-by: Alim Akhtar <alim.akhtar@...sung.com>



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