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Message-ID: <jhyqp7vlqsmnps52cgzzuyon3aihcxizog4bknnofuibhud5ry@3nix3cwzwapw>
Date: Wed, 17 Dec 2025 10:38:47 +0530
From: Anirudh Rayabharam <anirudh@...rudhrb.com>
To: vdso@...lbox.org
Cc: kys@...rosoft.com, decui@...rosoft.com, haiyangz@...rosoft.com, 
	linux-kernel@...r.kernel.org, longli@...rosoft.com, wei.liu@...nel.org, 
	linux-hyperv@...r.kernel.org
Subject: Re: [PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts

On Tue, Dec 16, 2025 at 07:07:45AM -0800, vdso@...lbox.org wrote:
> 
> > On 12/16/2025 6:20 AM  Anirudh Rayabharam <anirudh@...rudhrb.com> wrote:
> 
> [...]
> 
> > +#if IS_ENABLED(CONFIG_ARM64)
> > +union hv_arm64_vp_execution_state {
> > +	u16 as_uint16;
> > +	struct {
> > +		u16 cpl:2;
> 
> That looks oddly x86(-64)-specific (Current Priviledge Level).
> 
> Unless I'm mistaken, CPL doesn't belong here, and the bitfield isn't
> used on ARM64. Provided the layout of the struct is correct, the
> bitfield can have a better name of `reserved0` or something like that.

Hmmm... this is how it is defined in the hypervisor headers though.

Anirudh.

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