linux-kernel - [irq-msi] questions about irq msi

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Message-Id: <C5C27FDB-1EF2-43A4-A736-D67CFAD443C6@linaro.org>
Date: Wed, 17 Dec 2025 09:58:00 +0800
From: Chao Xie <chao.xie@...aro.org>
To: linux-kernel@...r.kernel.org
Cc: tglx@...utronix.de
Subject: [irq-msi] questions about irq msi_desc usage

I intend to upstream a driver for a new bus, which utilizes MSI IRQ. 
I have some questions regarding how to implement MSI IRQ support for it:
1. To define my own private data structure, should I follow the PCI MSI
    approach and add a structure like struct my_private_intr_desc to 
    the union? 
    struct msi_desc {
       ...
       union {
           struct pci_msi_desc     pci;
           struct msi_desc_data    data;
    +++   struct private_intr_desc   private_intr;
       };
     }; 
     I think I can make use of data.docckie.ptr to point to my private data
     structure, but I do not find any example in kernel, and not sure whether
      It is right or not.

2.   If I use data.dcookie.ptr to point to my private data structure,
      should this association be initialized in msi_domain_ops.set_desc()?

3. The Type 1 interrupt of this bus is similar to MSI. 
    Specifically, its configuration space includes registers such as 
    interrupt_enable, interrupt_mask, and interrupt_data, with the following
    specifications:
    • Interrupt Enable: The software configures this register to
       control whether the interrupt function of the Entity is enabled.
    • Interrupt Data: The software configures the start number of
       interrupt vectors into this register. When the Entity reports an
       interrupt, it shall follow the rules below:
       (1) When one interrupt vector is enabled, the interrupt data
             reported by the Entity shall be X, where X is the value
             configured in the Interrupt Data register.
       (2) When N interrupt vectors are enabled, the interrupt data
             reported by the Entity shall range from X to X+N-1, and
             the value shall correspond to the sequence of interrupt
             vectors. X is the value configured in the Interrupt Data
             register.
    • Interrupt Address: The software configures the interrupt
      address allocated by the interrupt subsystem into this register.
    • Interrupt Mask: The software configures this register to
      control whether the interrupt reporting corresponding to the
      Entity is masked. Its 32 bits correspond to 32 interrupt vector
      numbers respectively.
  In this case, when allocating msi_desc, should I follow the PCI MSI
  model where one msi_desc represents multiple interrupts 
  (i.e.,set msi_desc.nvec_used = n)? If this is the correct approach, 
  is itfeasible to add a judgment similar to PCI MSI in
  msi_domain_get_virq() as follows:
         if (dev_is_pci(dev) && domid == MSI_DEFAULT_DOMAIN)
            devmsi = to_pci_dev(dev)->msi_enabled;
  +++ if (dev_is_my_private(dev) && domid == MSI_DEFAULT_DOMAIN)
  +++    devmsi = to_my_private_entity(dev)->is_type1;