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Message-ID: <176597508743.510.8527612472256743629.tip-bot2@tip-bot2>
Date: Wed, 17 Dec 2025 12:38:07 -0000
From: "tip-bot2 for Kan Liang" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Kan Liang <kan.liang@...ux.intel.com>, Mingwei Zhang <mizhang@...gle.com>,
 Sean Christopherson <seanjc@...gle.com>,
 "Peter Zijlstra (Intel)" <peterz@...radead.org>,
 Xudong Hao <xudong.hao@...el.com>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject: [tip: perf/core] perf/x86/intel: Support PERF_PMU_CAP_MEDIATED_VPMU

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     4280d79587a3fd4bf9415705536fe385467c5f44
Gitweb:        https://git.kernel.org/tip/4280d79587a3fd4bf9415705536fe385467c5f44
Author:        Kan Liang <kan.liang@...ux.intel.com>
AuthorDate:    Fri, 05 Dec 2025 16:16:48 -08:00
Committer:     Peter Zijlstra <peterz@...radead.org>
CommitterDate: Wed, 17 Dec 2025 13:31:06 +01:00

perf/x86/intel: Support PERF_PMU_CAP_MEDIATED_VPMU

Apply the PERF_PMU_CAP_MEDIATED_VPMU for Intel core PMU. It only indicates
that the perf side of core PMU is ready to support the mediated vPMU.
Besides the capability, the hypervisor, a.k.a. KVM, still needs to check
the PMU version and other PMU features/capabilities to decide whether to
enable support mediated vPMUs.

[sean: massage changelog]
Signed-off-by: Kan Liang <kan.liang@...ux.intel.com>
Signed-off-by: Mingwei Zhang <mizhang@...gle.com>
Signed-off-by: Sean Christopherson <seanjc@...gle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Tested-by: Xudong Hao <xudong.hao@...el.com>
Link: https://patch.msgid.link/20251206001720.468579-13-seanjc@google.com
---
 arch/x86/events/intel/core.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index bdf3f0d..0553c11 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -5695,6 +5695,8 @@ static void intel_pmu_check_hybrid_pmus(struct x86_hybrid_pmu *pmu)
 	else
 		pmu->intel_ctrl &= ~GLOBAL_CTRL_EN_PERF_METRICS;
 
+	pmu->pmu.capabilities |= PERF_PMU_CAP_MEDIATED_VPMU;
+
 	intel_pmu_check_event_constraints_all(&pmu->pmu);
 
 	intel_pmu_check_extra_regs(pmu->extra_regs);
@@ -7314,6 +7316,9 @@ __init int intel_pmu_init(void)
 			pr_cont(" AnyThread deprecated, ");
 	}
 
+	/* The perf side of core PMU is ready to support the mediated vPMU. */
+	x86_get_pmu(smp_processor_id())->capabilities |= PERF_PMU_CAP_MEDIATED_VPMU;
+
 	/*
 	 * Many features on and after V6 require dynamic constraint,
 	 * e.g., Arch PEBS, ACR.

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