linux-kernel - [tip: perf/core] perf/x86/core: Do not set bit width for unavailable counters

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Message-ID: <176597508955.510.3883765445504586547.tip-bot2@tip-bot2>
Date: Wed, 17 Dec 2025 12:38:09 -0000
From: "tip-bot2 for Sandipan Das" <tip-bot2@...utronix.de>
To: linux-tip-commits@...r.kernel.org
Cc: Sandipan Das <sandipan.das@....com>,
 Dapeng Mi <dapeng1.mi@...ux.intel.com>, Mingwei Zhang <mizhang@...gle.com>,
 Sean Christopherson <seanjc@...gle.com>,
 "Peter Zijlstra (Intel)" <peterz@...radead.org>,
 Xudong Hao <xudong.hao@...el.com>, x86@...nel.org,
 linux-kernel@...r.kernel.org
Subject:
 [tip: perf/core] perf/x86/core: Do not set bit width for unavailable counters

The following commit has been merged into the perf/core branch of tip:

Commit-ID:     b456a6ba5756b6fb7e651775343e713bd08418e7
Gitweb:        https://git.kernel.org/tip/b456a6ba5756b6fb7e651775343e713bd08418e7
Author:        Sandipan Das <sandipan.das@....com>
AuthorDate:    Fri, 05 Dec 2025 16:16:46 -08:00
Committer:     Peter Zijlstra <peterz@...radead.org>
CommitterDate: Wed, 17 Dec 2025 13:31:06 +01:00

perf/x86/core: Do not set bit width for unavailable counters

Not all x86 processors have fixed counters. It may also be the case that
a processor has only fixed counters and no general-purpose counters. Set
the bit widths corresponding to each counter type only if such counters
are available.

Fixes: b3d9468a8bd2 ("perf, x86: Expose perf capability to other modules")
Signed-off-by: Sandipan Das <sandipan.das@....com>
Co-developed-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
Signed-off-by: Dapeng Mi <dapeng1.mi@...ux.intel.com>
Signed-off-by: Mingwei Zhang <mizhang@...gle.com>
Signed-off-by: Sean Christopherson <seanjc@...gle.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@...radead.org>
Tested-by: Xudong Hao <xudong.hao@...el.com>
Link: https://patch.msgid.link/20251206001720.468579-11-seanjc@google.com
---
 arch/x86/events/core.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 3ad5c65..3f78388 100644
--- a/arch/x86/events/core.c
+++ b/arch/x86/events/core.c
@@ -3105,8 +3105,8 @@ void perf_get_x86_pmu_capability(struct x86_pmu_capability *cap)
 	cap->version		= x86_pmu.version;
 	cap->num_counters_gp	= x86_pmu_num_counters(NULL);
 	cap->num_counters_fixed	= x86_pmu_num_counters_fixed(NULL);
-	cap->bit_width_gp	= x86_pmu.cntval_bits;
-	cap->bit_width_fixed	= x86_pmu.cntval_bits;
+	cap->bit_width_gp	= cap->num_counters_gp ? x86_pmu.cntval_bits : 0;
+	cap->bit_width_fixed	= cap->num_counters_fixed ? x86_pmu.cntval_bits : 0;
 	cap->events_mask	= (unsigned int)x86_pmu.events_maskl;
 	cap->events_mask_len	= x86_pmu.events_mask_len;
 	cap->pebs_ept		= x86_pmu.pebs_ept;