linux-kernel - Re: [PATCH v9 10/11] crypto: qce

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Message-ID: <CAMRc=MeDQgDzjRDVodJhPpHye6LYLmigsHhRjDqTK1Kn5+EhqQ@mail.gmail.com>
Date: Thu, 18 Dec 2025 16:32:20 +0100
From: Bartosz Golaszewski <brgl@...nel.org>
To: Konrad Dybcio <konrad.dybcio@....qualcomm.com>
Cc: Vinod Koul <vkoul@...nel.org>, Jonathan Corbet <corbet@....net>, 
	Thara Gopinath <thara.gopinath@...il.com>, Herbert Xu <herbert@...dor.apana.org.au>, 
	"David S. Miller" <davem@...emloft.net>, Udit Tiwari <quic_utiwari@...cinc.com>, 
	Daniel Perez-Zoghbi <dperezzo@...cinc.com>, Md Sadre Alam <mdalam@....qualcomm.com>, 
	Dmitry Baryshkov <lumag@...nel.org>, dmaengine@...r.kernel.org, linux-doc@...r.kernel.org, 
	linux-kernel@...r.kernel.org, linux-arm-msm@...r.kernel.org, 
	linux-crypto@...r.kernel.org, 
	Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
Subject: Re: [PATCH v9 10/11] crypto: qce - Add support for BAM locking

On Mon, Dec 1, 2025 at 2:03 PM Konrad Dybcio
<konrad.dybcio@....qualcomm.com> wrote:
>
> On 11/28/25 12:44 PM, Bartosz Golaszewski wrote:
> > From: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> >
> > Implement the infrastructure for using the new DMA controller lock/unlock
> > feature of the BAM driver. No functional change for now.
> >
> > Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@...aro.org>
> > ---
> >  drivers/crypto/qce/common.c | 18 ++++++++++++++++++
> >  drivers/crypto/qce/dma.c    | 39 ++++++++++++++++++++++++++++++++++-----
> >  drivers/crypto/qce/dma.h    |  4 ++++
> >  3 files changed, 56 insertions(+), 5 deletions(-)
> >
> > diff --git a/drivers/crypto/qce/common.c b/drivers/crypto/qce/common.c
> > index 04253a8d33409a2a51db527435d09ae85a7880af..74756c222fed6d0298eb6c957ed15b8b7083b72f 100644
> > --- a/drivers/crypto/qce/common.c
> > +++ b/drivers/crypto/qce/common.c
> > @@ -593,3 +593,21 @@ void qce_get_version(struct qce_device *qce, u32 *major, u32 *minor, u32 *step)
> >       *minor = (val & CORE_MINOR_REV_MASK) >> CORE_MINOR_REV_SHIFT;
> >       *step = (val & CORE_STEP_REV_MASK) >> CORE_STEP_REV_SHIFT;
> >  }
> > +
> > +int qce_bam_lock(struct qce_device *qce)
> > +{
> > +     qce_clear_bam_transaction(qce);
> > +     /* Dummy write to acquire the lock on the BAM pipe. */
> > +     qce_write(qce, REG_AUTH_SEG_CFG, 0);
>
> This works because qce_bam_lock() isn't used in a place where the state
> of this register matters which isn't obvious.. but I'm not sure there's
> a much better one to use in its place
>
> Wonder if we could use the VERSION one (base+0x0) - although it's supposed
> to be read-only, but at the same time I don't think that matters much for
> the BAM engine
>

It seems that we can use VERSION as well, so I'll change that in v10.

Bart