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Message-ID: <20251218200618.GF1749918@liuwe-devbox-debian-v2.local>
Date: Thu, 18 Dec 2025 20:06:18 +0000
From: Wei Liu <wei.liu@...nel.org>
To: Anirudh Rayabharam <anirudh@...rudhrb.com>
Cc: vdso@...lbox.org, kys@...rosoft.com, decui@...rosoft.com,
haiyangz@...rosoft.com, linux-kernel@...r.kernel.org,
longli@...rosoft.com, wei.liu@...nel.org,
linux-hyperv@...r.kernel.org
Subject: Re: [PATCH 1/3] hyperv: add definitions for arm64 gpa intercepts
On Wed, Dec 17, 2025 at 10:38:47AM +0530, Anirudh Rayabharam wrote:
> On Tue, Dec 16, 2025 at 07:07:45AM -0800, vdso@...lbox.org wrote:
> >
> > > On 12/16/2025 6:20 AM Anirudh Rayabharam <anirudh@...rudhrb.com> wrote:
> >
> > [...]
> >
> > > +#if IS_ENABLED(CONFIG_ARM64)
> > > +union hv_arm64_vp_execution_state {
> > > + u16 as_uint16;
> > > + struct {
> > > + u16 cpl:2;
> >
> > That looks oddly x86(-64)-specific (Current Priviledge Level).
> >
> > Unless I'm mistaken, CPL doesn't belong here, and the bitfield isn't
> > used on ARM64. Provided the layout of the struct is correct, the
> > bitfield can have a better name of `reserved0` or something like that.
>
> Hmmm... this is how it is defined in the hypervisor headers though.
We should ask the hypervisor folks then. Once this gets out in the wild
it will be difficult to change.
Wei
>
> Anirudh.
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