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Message-ID: <e773f4ef-1772-47d5-bce8-9b97979391a5@socionext.com>
Date: Thu, 18 Dec 2025 18:52:36 +0900
From: Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
To: Rob Herring <robh@...nel.org>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
 Krzysztof Kozlowski <krzk+dt@...nel.org>, Conor Dooley
 <conor+dt@...nel.org>, Masami Hiramatsu <mhiramat@...nel.org>,
 linux-usb@...r.kernel.org, devicetree@...r.kernel.org,
 linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH] dt-bindings: usb: Add Socionext Uniphier DWC3 controller

On 2025/12/17 1:38, Rob Herring wrote:
> On Mon, Dec 15, 2025 at 7:22 PM Kunihiko Hayashi
> <hayashi.kunihiko@...ionext.com> wrote:
>>
>> Hi Rob,
>>
>> On 2025/12/16 6:25, Rob Herring (Arm) wrote:
>>> The Socionext Uniphier DWC3 controller binding is already in use, but
>>> undocumented. It's a straight-forward binding similar to other DWC3
>>> bindings.
>>
>> After being pointed out by Krzysztof at OSSJapan, I've checked the
>> bindings
>> and was preparing some additions or fixes to resolve the warning.
>>
>> It's almost the same as my proposal, however, I add a little.
>>
>>>
>>> Signed-off-by: Rob Herring (Arm) <robh@...nel.org>
>>> ---
>>>    .../bindings/usb/socionext,uniphier-dwc3.yaml | 89 +++++++++++++++++++
>>>    1 file changed, 89 insertions(+)
>>>    create mode 100644
>>> Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
>>>
>>> diff --git
>>> a/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
>>> b/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
>>> new file mode 100644
>>> index 000000000000..892ae3458c1b
>>> --- /dev/null
>>> +++ b/Documentation/devicetree/bindings/usb/socionext,uniphier-dwc3.yaml
>>> @@ -0,0 +1,89 @@
>>> +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
>>> +%YAML 1.2
>>> +---
>>> +$id: http://devicetree.org/schemas/usb/socionext,uniphier-dwc3.yaml#
>>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>>> +
>>> +title: Socionext Uniphier SuperSpeed DWC3 USB SoC controller
>>> +
>>> +maintainers:
>>> +  - Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>
>>> +  - Masami Hiramatsu <mhiramat@...nel.org>
>>> +
>>> +select:
>>> +  properties:
>>> +    compatible:
>>> +      contains:
>>> +        const: socionext,uniphier-dwc3
>>> +  required:
>>> +    - compatible
>>> +
>>> +properties:
>>> +  compatible:
>>> +    items:
>>> +      - const: socionext,uniphier-dwc3
>>> +      - const: snps,dwc3
>>> +
>>> +  reg:
>>> +    maxItems: 1
>>> +
>>> +  interrupts:
>>> +    minItems: 1
>>> +    items:
>>> +      - description: Host or single combined interrupt
>>> +      - description: Peripheral interrupt
>>> +
>>> +  interrupt-names:
>>> +    minItems: 1
>>> +    items:
>>> +      - enum:
>>> +          - dwc_usb3
>>> +          - host
>>> +      - const: peripheral
>> There's no problem, but how about the following description
>> following snps,dwc3.yaml?
>>
>>     interrupt-names:
>>       oneOf:
>>         - const: dwc_usb3
>>         - items:
>>             enum: [host, peripheral]
> 
> That allows for 'peripheral, host' or just 'peripheral'. Mine would
> seemingly allow 'dwc_usb3, host', but snps,dwc3.yaml will prevent
> that.

I see. The property combinations are complex, so
I'll follow your suggestion from the currnet .dts files.
  
>>
>>> +
>>> +  clocks:
>>> +    maxItems: 3
>>> +
>>> +  clock-names:
>>> +    items:
>>> +      - const: ref
>>> +      - const: bus_early
>>> +      - const: suspend
>>> +
>>> +  phys:
>>> +    description: 1 to 4 HighSpeed PHYs followed by 1 or 2 SuperSpeed
>>> PHYs
>>> +    minItems: 2
>>> +    maxItems: 6
>>
>> Since Pro4 only has one PHY, so:
>>       minItems: 1
> 
> Ah, I only checked arm64. Will fix> 
> If there's other arm32 warnings, I'm not looking at those. So fixes
> appreciated there.

Yes, I'll address the arm32 warnings.

Thank you,

---
Best Regards
Kunihiko Hayashi

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