linux-kernel - Re: [PATCH 11/13] MIPS: Add Mobileye EyeQ6Lplus evaluation board dts

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <fe9e594f-9718-48b5-8208-fb567a54cae9@bootlin.com>
Date: Fri, 19 Dec 2025 16:57:29 +0100
From: Benoît Monin <benoit.monin@...tlin.com>
To: Krzysztof Kozlowski <krzk@...nel.org>,
 Vladimir Kondratiev <vladimir.kondratiev@...ileye.com>,
 Gregory CLEMENT <gregory.clement@...tlin.com>,
 Théo Lebrun <theo.lebrun@...tlin.com>,
 Thomas Bogendoerfer <tsbogend@...ha.franken.de>,
 Rob Herring <robh@...nel.org>, Krzysztof Kozlowski <krzk+dt@...nel.org>,
 Conor Dooley <conor+dt@...nel.org>,
 Michael Turquette <mturquette@...libre.com>, Stephen Boyd
 <sboyd@...nel.org>, Philipp Zabel <p.zabel@...gutronix.de>,
 Linus Walleij <linusw@...nel.org>
Cc: Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
 Tawfik Bayouk <tawfik.bayouk@...ileye.com>, linux-mips@...r.kernel.org,
 devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
 linux-clk@...r.kernel.org, linux-gpio@...r.kernel.org
Subject: Re: [PATCH 11/13] MIPS: Add Mobileye EyeQ6Lplus evaluation board dts

Hi Krzysztof,

On 12/18/25 16:30, Krzysztof Kozlowski wrote:
> On 17/12/2025 14:36, Benoît Monin wrote:
>> +
>> +&spi0 {
>> +	pinctrl-0 = <&spi0_pins>;
>> +	pinctrl-names = "default";
>> +	status = "okay";
>> +	spidev@0 {
>> +		compatible = "lwn,bk4-spi";
> 
> NAK, you are not operating an excavator here.
> 
Indeed, I do not (and I should have known better...).

> Don't invent hardware.
> 
In my particular case of a microcontroller acting as an SPI "relay" on the
evaluation board, what would be the best way to describe it? It connects
the two SPI controllers of the SoC, one is a host and one is a target, so
it behave as an SPI target on one side and as an SPI host on the other.

The trivial devices bindings seems to be dedicated to devices, thus not for
SPI hosts. Do I need a dedicated binding or did I miss something I could
use for a trivial spidev slave?

> 
> Best regards,
> Krzysztof

Best regards,
-- 
Benoît Monin, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com