Message-ID: <20251219181805.GA1797@sol>
Date: Fri, 19 Dec 2025 10:18:05 -0800
From: Eric Biggers <ebiggers@...nel.org>
To: AlanSong-oc <AlanSong-oc@...oxin.com>
Cc: herbert@...dor.apana.org.au, Jason@...c4.com, ardb@...nel.org,
	linux-crypto@...r.kernel.org, linux-kernel@...r.kernel.org,
	CobeChen@...oxin.com, TonyWWang-oc@...oxin.com, YunShen@...oxin.com,
	GeorgeXue@...oxin.com, LeoLiu-oc@...oxin.com, HansHu@...oxin.com,
	x86@...nel.org
Subject: Re: [PATCH v2 1/2] lib/crypto: x86/sha1: PHE Extensions optimized
 SHA1 transform function

[+Cc x86@...nel.org]

On Fri, Dec 19, 2025 at 04:03:05PM +0800, AlanSong-oc wrote:
> diff --git a/lib/crypto/Makefile b/lib/crypto/Makefile
> index d2845b214..069069377 100644
> --- a/lib/crypto/Makefile
> +++ b/lib/crypto/Makefile
> @@ -205,7 +205,8 @@ endif
>  libsha1-$(CONFIG_SPARC) += sparc/sha1_asm.o
>  libsha1-$(CONFIG_X86) += x86/sha1-ssse3-and-avx.o \
>  			 x86/sha1-avx2-asm.o \
> -			 x86/sha1-ni-asm.o
> +			 x86/sha1-ni-asm.o \
> +			 x86/sha1-phe-asm.o
>  endif # CONFIG_CRYPTO_LIB_SHA1_ARCH
>  
>  ################################################################################
> diff --git a/lib/crypto/x86/sha1-phe-asm.S b/lib/crypto/x86/sha1-phe-asm.S
> new file mode 100644
> index 000000000..eff086104
> --- /dev/null
> +++ b/lib/crypto/x86/sha1-phe-asm.S
> @@ -0,0 +1,71 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
> +/*
> + * PHE Extensions optimized implementation of a SHA-1 update function
> + *
> + * This file is provided under a dual BSD/GPLv2 license.  When using or
> + * redistributing this file, you may do so under either license.
> + *
> + * GPL LICENSE SUMMARY
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of version 2 of the GNU General Public License as
> + * published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful, but
> + * WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
> + * General Public License for more details.
> + *
> + * BSD LICENSE
> + *
> + * Redistribution and use in source and binary forms, with or without
> + * modification, are permitted provided that the following conditions
> + * are met:
> + *
> + * 	* Redistributions of source code must retain the above copyright
> + * 	  notice, this list of conditions and the following disclaimer.
> + * 	* Redistributions in binary form must reproduce the above copyright
> + * 	  notice, this list of conditions and the following disclaimer in
> + * 	  the documentation and/or other materials provided with the
> + * 	  distribution.
> + * 	* Neither the name of Intel Corporation nor the names of its
> + * 	  contributors may be used to endorse or promote products derived
> + * 	  from this software without specific prior written permission.
> + *
> + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
> + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
> + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
> + * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
> + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
> + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
> + * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
> + * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
> + * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
> + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
> + * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
> + *
> + */
> +
> +#include <linux/linkage.h>
> +
> +/*
> + * PHE Extensions optimized implementation of a SHA-1 block function
> + *
> + * This function takes a pointer to the current SHA-1 state, a pointer to the
> + * input data, and the number of 64-byte blocks to process.  The number of
> + * blocks to process is assumed to be nonzero.  Once all blocks have been
> + * processed, the state is updated with the new state.  This function only
> + * processes complete blocks.  State initialization, buffering of partial
> + * blocks, and digest finalization are expected to be handled elsewhere.
> + *
> + * void sha1_transform_phe(u8 *state, const u8 *data, size_t nblocks)
> + */
> +.text
> +SYM_FUNC_START(sha1_transform_phe)
> +	mov		$-1, %rax
> +	mov		%rdx, %rcx
> +
> +	.byte	0xf3,0x0f,0xa6,0xc8
> +
> +	RET
> +SYM_FUNC_END(sha1_transform_phe)

Please make this an inline asm statement instead of using a .S file.
It's just one instruction.

> +#define PHE_ALIGNMENT 16
> +asmlinkage void sha1_transform_phe(u8 *state, const u8 *data, size_t nblocks);
> +static void sha1_blocks_phe(struct sha1_block_state *state,
> +			     const u8 *data, size_t nblocks)
> +{
> +	/*
> +	 * XSHA1 requires %edi to point to a 32-byte, 16-byte-aligned
> +	 * buffer on Zhaoxin processors.
> +	 */

What is the largest 'nblocks' that the instruction supports?

What happens if the instruction is interrupted partway through?  Does
the CPU correctly resume it in all cases?

Is it supported in both 32-bit and 64-bit modes?  Your patch doesn't
check for CONFIG_64BIT.  Should it?  New optimized assembly code
generally should be 64-bit only.

Where is this instruction specified?  Please add a comment that links to
the specification.

> +	u8 buf[32 + PHE_ALIGNMENT - 1];
> +	u8 *dst = PTR_ALIGN(&buf[0], PHE_ALIGNMENT);
> +
> +	memcpy(dst, (u8 *)(state), SHA1_DIGEST_SIZE);
> +	sha1_transform_phe(dst, data, nblocks);
> +	memcpy((u8 *)(state), dst, SHA1_DIGEST_SIZE);
> +}

The casts to 'u8 *' are unnecessary.

> +
>  static void sha1_blocks(struct sha1_block_state *state,
>  			const u8 *data, size_t nblocks)
>  {
> @@ -59,6 +76,9 @@ static void sha1_mod_init_arch(void)
>  {
>  	if (boot_cpu_has(X86_FEATURE_SHA_NI)) {
>  		static_call_update(sha1_blocks_x86, sha1_blocks_ni);
> +	} else if (boot_cpu_has(X86_FEATURE_PHE) && boot_cpu_has(X86_FEATURE_PHE_EN)) {
> +		if (cpu_data(0).x86 >= 0x07)
> +			static_call_update(sha1_blocks_x86, sha1_blocks_phe);

Check IS_ENABLED(CONFIG_CPU_SUP_ZHAOXIN) first, so that the code gets
compiled out when support for Zhaoxin CPUs isn't included in the kernel.

There are hardly any mentions of 'cpu_data(0).x86' in the kernel.  I
think you mean 'boot_cpu_data.x86', which is used much more frequently.

What is the difference between X86_FEATURE_PHE and X86_FEATURE_PHE_EN,
and why are both needed?

All these comments apply to the SHA-256 patch too.

- Eric

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