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Message-Id: <20251219081354.3806806-1-xu.yang_2@nxp.com>
Date: Fri, 19 Dec 2025 16:13:54 +0800
From: Xu Yang <xu.yang_2@....com>
To: vkoul@...nel.org,
	neil.armstrong@...aro.org,
	shawnguo@...nel.org,
	kernel@...gutronix.de,
	festevam@...il.com,
	jun.li@....com,
	Frank.Li@....com
Cc: linux-phy@...ts.infradead.org,
	imx@...ts.linux.dev,
	linux-arm-kernel@...ts.infradead.org,
	linux-kernel@...r.kernel.org
Subject: [PATCH] phy: fsl-imx8mq-usb: change ssc_range value for i.MX8MQ

According to IC engineer suggestion, set ssc_range as -4003 ppm
will have more tolerance for EMI, and suitable for more boards.
Besides, it's confirmed that with this setting the TX SSC test
will pass on one customer board.

Signed-off-by: Li Jun <jun.li@....com>
Signed-off-by: Xu Yang <xu.yang_2@....com>
---
 drivers/phy/freescale/phy-fsl-imx8mq-usb.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
index cb2392008ad2..02d9af409b08 100644
--- a/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
+++ b/drivers/phy/freescale/phy-fsl-imx8mq-usb.c
@@ -18,6 +18,10 @@
 #define PHY_CTRL0_FSEL_MASK		GENMASK(10, 5)
 #define PHY_CTRL0_FSEL_24M		0x2a
 #define PHY_CTRL0_FSEL_100M		0x27
+#define PHY_CTRL0_SSC_RANGE_MASK	GENMASK(23, 21)
+#define PHY_CTRL0_SSC_RANGE_4003PPM	0x2
+#define PHY_CTRL0_SSC_RANGE_4492PPM	0x1
+#define PHY_CTRL0_SSC_RANGE_4980PPM	0x0
 
 #define PHY_CTRL1			0x4
 #define PHY_CTRL1_RESET			BIT(0)
@@ -780,6 +784,9 @@ static int imx8mq_usb_phy_init(struct phy *phy)
 
 	value = readl(imx_phy->base + PHY_CTRL0);
 	value |= PHY_CTRL0_REF_SSP_EN;
+	value &= ~PHY_CTRL0_SSC_RANGE_MASK;
+	value |= FIELD_PREP(PHY_CTRL0_SSC_RANGE_MASK,
+			    PHY_CTRL0_SSC_RANGE_4003PPM);
 	writel(value, imx_phy->base + PHY_CTRL0);
 
 	value = readl(imx_phy->base + PHY_CTRL2);
-- 
2.34.1


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