linux-kernel - Re: [PATCH v2 2/3] drm/msm/dpu: fix CMD panels on DPU 1.x

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Message-ID: <8895EC9F-E1E3-487D-A8E5-F9909BEE0CCF@somainline.org>
Date: Fri, 19 Dec 2025 12:34:00 +0100
From: Marijn Suijten <marijn.suijten@...ainline.org>
To: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>,
 Rob Clark <robin.clark@....qualcomm.com>,
 Dmitry Baryshkov <lumag@...nel.org>, Abhinav Kumar <abhinav.kumar@...ux.dev>,
 Jessica Zhang <jesszhan0024@...il.com>, Sean Paul <sean@...rly.run>,
 Alexey Minnekhanov <alexeymin@...tmarketos.org>,
 David Airlie <airlied@...il.com>, Simona Vetter <simona@...ll.ch>
CC: linux-arm-msm@...r.kernel.org, dri-devel@...ts.freedesktop.org,
 freedreno@...ts.freedesktop.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 2/3] drm/msm/dpu: fix CMD panels on DPU 1.x - 3.x

On 18 December 2025 15:38:24 CET, Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com> wrote:
>DPU units before 4.x don't have a separate CTL_START IRQ to mark the
>begin of the data transfer. In such a case, wait for the

Unfinished sentence. And would it make sense to note this down in a code-comment as well?

E.g.

...wait for the "transfer complete" IRQ if there's no CTL_START IRQ (or the ctl is already started).

Is there a significant timing difference on the two irqs, or does it not matter?

- Marijn

>
>Fixes: 050770cbbd26 ("drm/msm/dpu: Fix timeout issues on command mode panels")
>Reported-by: Alexey Minnekhanov <alexeymin@...tmarketos.org>
>Closes: https://lore.kernel.org/r/8e1d33ff-d902-4ae9-9162-e00d17a5e6d1@postmarketos.org
>Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@....qualcomm.com>
>---
> drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
>index 0ec6d67c7c70..e6f55902e355 100644
>--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
>+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c
>@@ -681,7 +681,8 @@ static int dpu_encoder_phys_cmd_wait_for_commit_done(
> 	if (!dpu_encoder_phys_cmd_is_master(phys_enc))
> 		return 0;
> 
>-	if (phys_enc->hw_ctl->ops.is_started(phys_enc->hw_ctl))
>+	if (phys_enc->hw_ctl->ops.is_started(phys_enc->hw_ctl) ||
>+	    !phys_enc->irq[INTR_IDX_CTL_START])
> 		return dpu_encoder_phys_cmd_wait_for_tx_complete(phys_enc);
> 
> 	return _dpu_encoder_phys_cmd_wait_for_ctl_start(phys_enc);
>